參數資料
型號： UPD70216HLP-10
廠商： NEC Corp.
英文描述： V40HLTM, V50HLTM 16/8, 16-BIT MICROPROCESSOR
中文描述： V40HLTM，V50HLTM 16 / 8，16位微處理器
文件頁數： 69/110頁
文件大小： 625K
代理商： UPD70216HLP-10
69
μ
PD70208H, 70216H
Data Sheet U13225EJ4V0DS00
MIN.
MAX.
MIN.
MAX.
MIN.
MAX.
CLKOUT
↑ →
ASTB
↓
delay time
ASTB high-level width
ASTB
↓ →
address hold time
CLKOUT
→
control 1
Note 1
delay time
CLKOUT
→
control 2
Note 2
delay time
Address float
→
RD
↓
delay time
CLKOUT
↓ →
RD
↓
delay time
CLKOUT
↓ →
RD
↑
delay time
RD
↑ →
address delay time
RD low-level width
BUFEN
↑ →
BUFR/W delay time (read cycle)
CLKOUT
↓ →
data output delay time
CLKOUT
↓ →
data float delay time
WR low-level width
WR
↑ →
BUFEN
↑
or BUFR/W
↓
(write cycle)
CLKOUT
↑ →
BS
↓
delay time
CLKOUT
↓ →
BS
↑
delay time
HLDRQ setup time (vs. CLKOUT
↓
)
CLKOUT
↓ →
HLDAK delay time
CLKOUT
↑ →
DMAAK delay time
CLKOUT
↓ →
DMAAK delay time (cascade mode)
WR low-level width
DMA extended write
(DMA cycle)
DMA normal write
RD
↓
, WR
↓
delay time (vs. DMAAK
↓
)
DMAAK
↑
delay time (vs. RD
↑
)
RD
↑
delay time (vs. WR
↑
)
TC output delay time (vs. CLKOUT
↑
)
TC OFF delay time (vs. CLKOUT
↑
)
TC low-level width
TC pull-up delay time (vs. CLKOUT
↑
)
END setup time (vs. CLKOUT
↑
)
END low-level width
DMARQ setup time (vs. CLKOUT
↑
)
INTPn low-level width
R
X
D setup time (vs. SCU internal clock
↓
)
(1)
μ
PD70208H, 70216H-10/12/16 (T
A
= –40 to +85
°
C, V
DD
= 5 V
±
10%) (2/3)
μ
PD70208H-10
μ
PD70216H-10
μ
PD70208H-16
μ
PD70216H-16
μ
PD70208H-12
μ
PD70216H-12
Notes 1.
MWR and IOWR signals in DMA cycle
2.
MWR and IOWR signals in CPU cycles and BUFEN, BUFR/W, INTAK and REFRQ signals.
3.
t
KKH
+ 2t
CYK
– 10 (Reference value when a 1.1-k
pull-up resistor is connected.)
4.
t
KKH
+ 2t
CYK
– 5 (Reference value when a 1.1-k
pull-up resistor is connected.)
Symbol
Parameter
Unit
Output Pin Load Capacitance: C
L
= 100 pF
t
DKSTL
45
35
30
ns
t
STST
t
KKL
–10
t
KKL
–10
t
KKL
–10
ns
t
HSTA
t
KKH
–20
t
KKH
–10
t
KKH
–10
ns
t
DKCT1
5
60
5
50
5
40
ns
t
DKCT2
5
55
5
45
5
35
ns
t
DAFRL
0
0
0
ns
t
DKRL
5
65
5
50
5
40
ns
t
DKRH
5
60
5
45
5
35
ns
t
DRHA
t
CYK
–40
t
CYK
–20
t
CYK
–10
ns
t
RR
2t
CYK
–40
2t
CYK
–20
2t
CYK
–20
ns
t
DBECT
t
KKL
–20
t
KKL
–10
t
KKL
–10
ns
t
DKD
5
55
5
40
5
30
ns
t
FKD
5
55
5
40
5
30
ns
t
WW
2t
CYK
–40
2t
CYK
–20
2t
CYK
–20
ns
t
DWCT
t
KKL
–20
t
KKL
–10
t
KKL
–10
ns
t
DKBL
5
55
5
40
5
30
ns
t
DKBH
5
55
5
40
5
30
ns
t
SHQK
15
10
7
ns
t
DKHA
5
60
5
50
5
40
ns
t
DKHDA
5
55
5
45
5
35
ns
t
DKLDA
5
80
5
70
5
55
ns
t
WW1
2t
CYK
–40
2t
CYK
–20
2t
CYK
–20
ns
t
WW2
t
CYK
–40
t
CYK
–20
t
CYK
–15
ns
t
DDARW
t
KKH
–30
t
KKH
–20
t
KKH
–15
ns
t
DRHDAH
t
KKL
–30
t
KKL
–20
t
KKL
–15
ns
t
DWHRH
3
3
3
ns
t
DKTCL
55
45
35
ns
t
DKTCF
55
45
35
ns
t
TCTCL
t
CYK
–15
t
CYK
–10
t
CYK
–10
ns
t
DKTCH
Note 3
Note 4
Note 4
ns
t
SEDK
30
25
20
ns
t
EDEDL
80
65
50
ns
t
SDQK
30
20
15
ns
t
IPIPL
80
80
80
ns
t
SRX
500
500
500
ns
<34>
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<37>
<38>
<39>
<40>
<41>
<42>
<43>
<44>
<45>
<46>
<47>
<48>
<49>
<50>
<51>
<52>
<53>
<54>
<55>
<56>
<57>
<58>
<59>
<60>
<61>
<62>
<63>
<64>
<65>
<66>
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<68>
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相關代理商/技術參數
參數描述
UPD70216HLP-12 制造商:NEC 制造商全稱:NEC 功能描述:V40HLTM, V50HLTM 16/8, 16-BIT MICROPROCESSOR
UPD70216HLP-16 制造商:NEC 制造商全稱:NEC 功能描述:V40HLTM, V50HLTM 16/8, 16-BIT MICROPROCESSOR
UPD70216HLP-20 制造商:NEC 制造商全稱:NEC 功能描述:V40HLTM, V50HLTM 16/8, 16-BIT MICROPROCESSOR
UPD70216L10 制造商:未知廠家 制造商全稱:未知廠家 功能描述:16-Bit Microprocessor
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