參數(shù)資料
型號: UPD703014AY
廠商: NEC Corp.
英文描述: V850/SA1TM 32-/16-BIT SINGLE-CHIP MICROCONTROLLER
中文描述: V850/SA1TM 32-/16-BIT單片機
文件頁數(shù): 11/48頁
文件大?。?/td> 309K
代理商: UPD703014AY
Data Sheet U14526EJ2V0DS00
11
μ
PD703014A, 703014AY, 703015A, 703015AY, 703017A, 703017AY
1.2 Non-Port Pins
(1/3)
Pin Name
I/O
PULL
Function
Alternate Function
A1 to A4
P110 to P113
A5 to A12
P100/RTP0 to
P107/RTP7
A13
P34/TO0
A14
P35/TI1
A15
Output
Yes
Low-order address bus used for external memory expansion
P36/TI4/TO4
A16 to A21
Output
No
High-order address bus used for external memory expansion
P60 to P65
AD0 to AD7
P40 to P47
AD8 to AD15
I/O
No
16-bit multiplexed address/data bus used for external memory
expansion
P50 to P57
ADTRG
Input
Yes
A/D converter external trigger input
P05/INTP4
ANI0 to ANI7
Input
No
P70 to P77
ANI8 to ANI11
Input
No
Analog input to A/D converter
P80 to P83
ASCK0
P15/SCK1
ASCK1
Input
Yes
Serial clock input for UART0 and UART1
P25
ASTB
Output
No
External address strobe signal output
P94
AV
DD
Positive power supply for A/D converter
AV
REF
Input
Reference voltage input for A/D converter
AV
SS
Ground potential for A/D converter
BV
DD
Positive power supply for bus interface
BV
SS
Ground potential for bus interface
CLKOUT
Output
Internal system clock output
DSTB
Output
No
External data strobe signal output
P93/RD
HLDAK
Output
No
Bus hold acknowledge output
P95
HLDRQ
Input
No
Bus hold request input
P96
INTP0 to INTP3
External interrupt request input (analog noise elimination)
P01 to P04
INTP4
P05/ADTRG
INTP5
P06/RTPTRG
INTP6
Input
Yes
External interrupt request input (digital noise elimination)
P07
LBEN
Output
No
External data bus’s low-order byte enable signal output
P90/WRL
NMI
Input
Yes
Non-maskable interrupt request input
P00
RD
Output
No
Read strobe signal output
P93/DSTB
RESET
Input
System reset input
RTP0 to RTP7
Output
Yes
Real-time output port
P100/A5 to P107/A12
Remark
PULL: On-chip pull-up resistor
相關PDF資料
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