參數(shù)資料
型號: UPD703130GC-8EU
廠商: NEC Corp.
英文描述: MOS INTEGRATED CIRCUIT
中文描述: 馬鞍山集成電路
文件頁數(shù): 59/72頁
文件大?。?/td> 601K
代理商: UPD703130GC-8EU
Preliminary Data Sheet U15390EJ1V0DS
59
μ
PD703130
(j) CBR self-refresh timing
Parameter
Symbol
Condition
MIN.
MAX.
Unit
CAS hold time
<114>
t
CHS
5
ns
RAS precharge time
<115>
t
RPS
(1 + 2w
SRW
)T – 10
ns
Remarks 1.
T = t
CYK
2.
w
SRW
: The number of waits due to the SRW0 to SRW2 bits of the RWC register.
Remarks 1.
This is the timing for the following case.
Number of waits due to the RRW0 and RRW1 bits of the RWC register (TRRW): 1
Number of waits due to the RCW0 to RCW2 bits of the RWC register (TRCW): 1
Number of waits due to the SRW0 to SRW2 bits of the RWC register (TSRW): 2
2.
The broken lines indicate high impedance.
3.
n = 3 to 5
TH
TH
TH
TRRW
TSRW
TI
TH
TRCW
TSRW
Output signals
other than above
<115>
<114>
CLKOUT (Output)
RASn (Output)
UCAS (Output)
LCAS (Output)
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