參數(shù)資料
型號(hào)： UPD72001-A8
廠(chǎng)商： NEC Corp.
英文描述： MULTI-PROTOCOL SERIAL CONTROLLERS
中文描述： 多協(xié)議串行控制器
文件頁(yè)數(shù)： 3/40頁(yè)
文件大?。?/td> 206K
代理商： UPD72001-A8
μ
PD72001-11, 72001-A8
3
SPECIFICATIONS
Item
Specifications
Part number
μ
PD72001-11
μ
PD72001-A8
Supply voltage
5 V
±
10 %
3.3 V
±
0.3 V
System clock frequency
11 MHz MAX.
8 MHz MAX. (at T
A
= –10 to +70
°
C)
7.14 MHz MAX. (at T
A
= –40 to +85
°
C)
Maximum transfer rate
2.2 Mbps
1.6 Mbps (at T
A
= –10 to +70
°
C)
1.43 Mbps (at T
A
= –40 to +85
°
C)
Process
CMOS
Internal circuit
Parallel/serial converter circuit: Full-duplex channel
×
2
Transmit buffer: Double
Receive buffer : Quadruple
Interrupt control function
DMA request signal output: 2 for transmission, 2 for reception
Overrun error detection
DPLL
Baud rate generator
Crystal oscillation circuit for transmission/reception clock generation
Self-loopback test function
Standby function
General-purpose I/O pin: 4 pins
×
2
Communication protocol
Start-stop
synchronization
Character bit length: 5, 6, 7, 8
Stop bit length: 1, 1.5, 2
Clock rate:
×
1,
×
16,
×
32,
×
64
Parity generation, check
Framing error detection
Break generation, detection
COP
(Character
Oriented
Protocol)
Operation mode: Mono-sync, Bi-sync, External sync
Character bit length: 5, 6, 7, 8
SYNC character bit length: 6, 8
Character synchronization: Internal/external
BCS (Block Check Sequence) generation, check:
CRC-16
CRC-CCITT
Parity generation, check
SYNC character automatic transmission, detection, rejection
BOP
(Bit Oriented
Protocol)
Operation mode:
HDLC (High-level Data Link Control)
SDLC (Synchronous Data Link Control)
SDLC Loop
Flag transmission, detection
Zero insertion, rejection
Address field detection (1 byte)
FCS (Frame Check Sequence) generation, detection
Short frame detection
Abort automatic transmission, detection
Idle detection
Go Ahead detection
Transmit number data control
Processing data format
Encode/decode of NRZ (Non-Return to Zero)
Encode/decode of NRZI (Non-Return to Zero Inverted)
Encode/decode of FM (Frequency Modulation)
Decode in Manchester mode
相關(guān)PDF資料
PDF描述
UPD72001G-11-22 MULTI-PROTOCOL SERIAL CONTROLLERS
UPD72001C-11 MULTI-PROTOCOL SERIAL CONTROLLERS
UPD72001L-11 5015 RR 14#16 SKT RECP
UPD72001G-A8-22 MULTI-PROTOCOL SERIAL CONTROLLERS
UPD720101GJ-UEN USB2.0 HOST CONTROLLER
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UPD720101F1-EA8-A 功能描述:HOST CTLR USB 2.0 144-FBGA RoHS:是 類(lèi)別:集成電路 (IC) >> 接口 - 控制器 系列:- 標(biāo)準(zhǔn)包裝:2,450 系列:- 控制器類(lèi)型:SPI 總線(xiàn)至 I²C 總線(xiàn)橋接 接口:I²C，串行，SPI 電源電壓:2.4 V ~ 3.6 V 電流 - 電源:11mA 工作溫度:-40°C ~ 85°C 安裝類(lèi)型:表面貼裝 封裝/外殼:24-VFQFN 裸露焊盤(pán) 供應(yīng)商設(shè)備封裝:24-HVQFN（4x4） 包裝:托盤(pán) 配用:568-3511-ND - DEMO BOARD SPI TO I2C 其它名稱(chēng):935286452157SC18IS600IBSSC18IS600IBS-ND
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