
μ
PD72001-11, 72001-A8
13
Table 1-6. Functions of SYNC Pins and Setting of CR4 (when CR15: D7 = “0”)
Operation
Protocol
Synchronization
Detection Mode
SYNC Pin
Function
CR4
D7
D6
D5
D4
D3
D2
Function
Start-stop
synchro-
nization
Input
×
×
0
1
1
1
0
1
The SYNC pins function as general-purpose
input pins. Changes in the status of these pin
(“H”
→
“L” or “L”
→
“H”) affect the latch
operation of the Sync/Hunt bit (SR1: D4), and
cause the E/S interrupt.
COP
Internal
synchro-
nization
Output
×
0
0
If a SYNC character is detected in the receive
character, the SYNC pins go “L” for the
duration of 1R
X
C cycle.
0
1
External
synchro-
nization
Input
0
0
1
1
0
0
The SYNC pins input a signal for establishing
character synchronization. When these pins
go “L” from “H”, execution exits from the Hunt
Phase and character synchronization is
established. While SYNC input is “L”,
character synchronization is maintained.
Assembling a receive character is started at
the rising edge of the receive clock preceding
the falling of the SYNC input.
0
1
BOP
No function
×
1
0
The SYNC pins do not function.
×
: Don’t Care
Caution If a pattern in which 1 bit (“0” or “1”) is inserted in between the “Sync character assigned to CR7”
and “Sync character assigned to CR6” is received while data is being assembled in the Bi-Sync
mode, an “L” pulse of about 1 bit may be generated on the SYNC pin. If the Enter Hunt command
is issued while this “L” pulse is present, the command is invalid. However, the recieve operation
of the MPSC is not affected at all by the reception of this pattern.
(5) TR
X
CA (Transmit Receive Clock A) ... I/O
TR
X
CB (Transmit Receive Clock B) ... I/O
(a) When CR15: D2 = “0”
These pins input the transmit and receive clocks. They are used to supply external transmit and receive
clocks.
[Exception]
If either CR15: D6, D5 = “0, 1” or D4, D3 = “0, 1”, or both are set, the TR
X
CA and TR
X
CB pins
function as input pins, even if CR15: D2 = “1”.
(b) When CR15: D2 = “1”
These pins function as output pins. The source of the output clock can be selected from a crystal oscillation
circuit, BRG, DPLL, or transmit clock, depending on the setting of CR15: D1, D0. Under the conditions
explained in [Exception] in (a) above, they unconditionally serve as input pins, and the setting of CR15: D2,
D1, D0 is invalid.