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參數(shù)資料
| 型號(hào)： | UPD750006GBA |
| 廠商： | NEC Corp. |
| 英文描述： | 4 BIT SINGLE-CHIP MICROCONTROLLER |
| 中文描述： | 4位單片機(jī) |
| 文件頁(yè)數(shù)： | 50/84頁(yè) |
| 文件大?。?/td> | 719K |
| 代理商： | UPD750006GBA |
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50
μ
PD750004, 750006, 750008, 750004(A), 750006(A), 750008(A)
Group
Subrou-
tine stack
control
Interrupt
control
Input/
output
CPU
control
Mne-
monic
RETI
Note 1
PUSH
POP
EI
DI
IN
Note 2
OUT
Note 2
HALT
STOP
NOP
Operand
rp
BS
rp
BS
IE
×××
IE
×××
A, PORTn
XA, PORTn
PORTn, A
PORTn, XA
Bytes
1
1
2
1
2
2
2
2
2
2
2
2
2
2
2
1
Machin-
ing
cycle
3
1
2
1
2
2
2
2
2
2
2
2
2
2
2
1
Skip
condition
Address-
ing area
Operation
μ
PD750004
MBE, RBE, 0, 0
←
(SP + 1)
PC
11-0
←
(SP) (SP + 3) (SP + 2)
PSW
←
(SP + 4) (SP + 5), SP
←
SP + 6
μ
PD750006, 750008
MBE, RBE, 0, PC
12
←
(SP + 1)
PC
11-0
←
(SP) (SP + 3) (SP + 2)
PSW
←
(SP + 4) (SP + 5), SP
←
SP + 6
μ
PD750004
0, 0, 0, 0
←
(SP + 1)
PC
11-0
←
(SP) (SP + 3) (SP + 2)
PSW
←
(SP + 4) (SP + 5), SP
←
SP + 6
μ
PD750006, 750008
0, 0, 0, PC
12
←
(SP + 1)
PC
11-0
←
(SP) (SP + 3) (SP + 2)
PSW
←
(SP + 4) (SP + 5), SP
←
SP + 6
(SP - 1)(SP - 2)
←
rp, SP
←
SP - 2
(SP - 1)
←
MBS, (SP - 2)
←
RBS,
SP
←
SP - 2
rp
←
(SP + 1)(SP), SP
←
SP + 2
MBS
←
(SP + 1), RBS
←
(SP),
SP
←
SP + 2
IME (IPS.3)
←
1
IE
×××
←
1
IME (IPS.3)
←
0
IE
×××
←
0
A
←
PORTn
(n = 0 - 8)
XA
←
PORTn
+1
,PORTn
(n = 4, 6)
PORTn
←
A
(n = 2 - 8)
PORTn
+1
,PORTn
←
XA
(n = 4, 6)
Set HALT Mode (PCC.2
←
1)
Set STOP Mode (PCC.3
←
1)
No Operation
Notes 1.
The shaded portion is supported in Mk
ΙΙ
mode only. The other portions are supported in Mk
Ι
mode only.
2.
When executing the IN/OUT instruction, MBE must be set to 0 or MBE and MBS must be set to 1 and 15,
respectively.
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