參數(shù)資料
型號(hào): uPD750066GTA
廠商: NEC Corp.
英文描述: CONNECTOR ACCESSORY
中文描述: 連接器附件
文件頁(yè)數(shù): 50/82頁(yè)
文件大?。?/td> 460K
代理商: UPD750066GTA
μ
PD750064, 750066, 750068, 750064(A), 750066(A), 750068(A)
50
Data Sheet U10165EJ2V0DS00
Instruction
Group
Number
of Bytes
Number
of Machine
Cycles
Addressing
Area
Mnemonic
Operand
Operation
Skip Condition
Branch
BR
PCDE
2
3
μ
PD750064
PC
11–0
PC
11-8
+DE
μ
PD750066, 750068
PC
12–0
PC
12-8
+DE
PCXA
2
3
μ
PD750064
PC
11–0
PC
11-8
+XA
μ
PD750066, 750068
PC
12–0
PC
12-8
+XA
BCDE
2
3
μ
PD750064
PC
11–0
BCDE
Note 1
*6
μ
PD750066, 750068
PC
12–0
BCDE
Note 2
BCXA
2
3
μ
PD750064
PC
11–0
BCXA
Note 1
*6
μ
PD750066, 750068
PC
12–0
BCXA
Note 2
BRA
Note 3
3
3
μ
PD750064
PC
11–0
addr1
*11
μ
PD750066, 750068
PC
12–0
addr1
BRCB
!caddr
2
2
μ
PD750064
PC
11–0
caddr
11–0
*8
μ
PD750066, 750068
PC
12–0
PC
12
+caddr
11–0
Subroutine
stack control
CALLA
Note 3
!addr1
3
3
μ
PD750064
(SP–2)
×
,
×
, MBE, RBE
(SP–6) (SP–3) (SP–4)
PC
11–0
(SP–5)
0, 0, 0, 0
PC
11–0
addr1, SP
SP–6
*11
μ
PD750066, 750068
(SP–2)
×
,
×
, MBE, RBE
(SP–6) (SP–3) (SP–4)
PC
11–0
(SP–5)
0, 0, 0, PC
12
PC
12–0
addr1, SP
SP–6
Notes 1.
“0” must be set to B register.
Only low-order one bit is valid in B register.
The operations indicated with thick lines can be performed only in the Mk II mode. The other operations
can be performed only in the Mk I mode.
2.
3.
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