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參數(shù)資料
| 型號： | UPD75036 |
| 廠商： | NEC Corp. |
| 英文描述： | 4 BIT SINGLE-CHIP MICROCOMPUTER |
| 中文描述： | 4位單片機 |
| 文件頁數(shù)： | 40/58頁 |
| 文件大?。?/td> | 485K |
| 代理商： | UPD75036 |
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40
μ
PD75036
CHARACTERISTICS OF THE MAIN SYSTEM CLOCK OSCILLATOR
(T
a
= -40 to +85
°
C, V
DD
= 2.7 to 6.0 V)
Notes 1.
The oscillator frequency and input frequency indicate only the oscillator characteristics. See the item
of AC characteristics for the instruction execution time.
2.
The oscillation settling time means the time required for the oscillation to settle after V
DD
is applied or
after the STOP mode is released.
3.
When 4.19 MHz < f
X
≤
5.0 MHz, do not select PCC = 0011 as the instruction execution time. When PCC
= 0011, one machine cycle falls short of 0.95
μ
s, the minimum value for the standard.
Caution When the main system clock oscillator is used, conform to the following guidelines when wiring
at the portions of surrounded by dotted lines in the figures above to eliminate the influence of
the wiring capacity.
The wiring must be as short as possible.
Other signal lines must not run in these areas.
Any line carrying a high fluctuating current must be kept away as far as possible.
The grounding point of the capacitor of the oscillator must have the same potential as that of
V
DD
. It must not be grounded to ground patterns carrying a large current.
No signal must be taken from the oscillator.
Recommended
constant
Ceramic
resonator
Crystal
resonator
External
clock
Oscillator
frequency
(f
X
)
Note 1
Oscillation
settling time
Note 2
Oscillator
frequency
(f
X
)
Note 1
Oscillation
settling time
Note 2
X1 input
frequency
(f
X
)
Note 1
X1 input
high/low
level width
(t
XH
, t
XL
)
Resonator
Parameter
MHz
ms
MHz
ms
ms
MHz
ns
4.19
Min.
Typ.
Max.
Unit
Conditions
5.0
4
5.0
Note 3
10
30
5.0
500
1.0
1.0
1.0
100
V
DD
= 4.5 to 6.0 V
X1
X2 V
DD
V
DD
C2
C1
X1
X2 V
DD
V
DD
C2
C1
X1
X2
μ
PD74HCU04
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