參數(shù)資料
型號(hào)： UPD75112GFA
廠商： NEC Corp.
英文描述： 4-Bit Single Chip-Microcomputer
中文描述： 4位單片微機(jī)
文件頁(yè)數(shù)： 36/56頁(yè)
文件大小： 499K
代理商： UPD75112GFA
36
μ
PD75112(A), 75116(A)
Instructions
Mnemonic
Subroutine
Stack Control
Interrupt
Control
Input/Output
CPU Control
Special
CALL
CALLF
RET
RETS
RETI
PUSH
POP
EI
DI
IN
*1
OUT
*1
HALT
STOP
NOP
SEL
GETI
*2
Operand
!addr
!faddr
rp
BS
rp
BS
IE
×××
IE
×××
A, PORTn
XA, PORTn
PORTn, A
PORTn, XA
RBn
MBn
taddr
Skip Condition
Unconditional
Depends on the
instruction
referred to.
* 1: MBE=0 or 1 and MBS=15 must be set for execution of IN/OUT instru,
2: TBR and TCALL instructions are assembler pseudo-instructions for GETI instruction table definition.
No. of Bytes
3
2
1
1
1
1
2
1
2
2
2
2
2
2
2
2
2
2
2
1
2
2
1
Machine Cycle
3
2
3
3+S
3
1
2
1
2
2
2
2
2
2
2
2
2
2
2
1
2
2
3
Operation
(SP-4)(SP-1)(SP-2)
←
PC
11-0
(SP-3)
←
MBE, RBE, PC
13, 12
PC
13-0
←
addr, SP
←
SP-4
(SP-4)(SP-1)(SP-2)
←
PC
11-0
(SP-3)
←
MBE, RBE, PC
13, 12
PC
13-0
←00,
faddr, SP
←
SP-4
MBE, RBE, PC
13, 12
←
(SP+1)
PC
11-0
←
(SP)(SP+3)(SP+2)
SP
←
SP+4
MBE, RBE, PC
13, 12
←
(SP+1)
PC
11-0
←
(SP)(SP+3)(SP+2)
SP
←
SP+4, then skip unconditionally
PC
13, 12
←
(SP+1)
PC
11-0
←
(SP)(SP+3)(SP+2)
PSW
←
(SP+4)(SP+5), SP
←
SP+6
(SP-1)(SP-2)
←
rp, SP
←
SP-2
(SP-1)
←
MBS, (SP-2)
←
RBS, SP
←
SP-2
rp
←
(SP-1)(SP), SP
←
SP-2
MBS
←
(SP+1), RBS
←
(SP), SP
←
SP+2
IME (IPS.3)
←
1
IE
×××←
1
IME (IPS.3)
←
0
IE
×××←0
A
←
PORTn
(n=0-9, 12-14)
XA
←
PORTn+1, PORTn (n=4, 6, 8, 12)
PORTn
←
4
(n=2-9, 12-14)
PORTn+1, PORTn
←
XA (n=4, 6, 8, 12)
Set HALT Mode (PCC.2
←
1)
Set STOP Mode (PCC.3
←
1)
No Operation
RBS
←
n(n=0-3)
MBS
←
n
(n=0, 1, 15)
TBR Instruction
PC
13-0
←
(taddr)
4-0
+(taddr+1)
TCALL Instruction
(SP-4)(SP-1)(SP-2)
←
PC
11-0
(SP-3)
←
MBE, RBE, PC
13, 12
PC
13-0
←
(taddr)
5-0
+(taddr+1)
SP
←
SP-4
When not TBR and TCALL
instructions, (taddr) and (taddr+1)
instructions are executed.
Addressing Area
*6
*9
*10
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