31
μ
PD75112(A), 75116(A)
MB=MBE
MBS
(MBS=0, 1, 15)
MB=0
MBE=0 : MB=0 (00H-7FH)
MB=15 (80H-FFH)
MBE=1 : MB=MBS (MBS=0, 1, 15)
MB=15, fmem=FB0H-FBFH,
FF0H=FFFH
MB=15, pmem=FC0H-FFFH
addr=0000H-2F7FH (
μ
PD75112(A))
=0000H-3F7FH (
μ
PD75116(A))
addr=(Current PC) -15 to
(Current PC) +16
caddr=0000H-0FFFH (PC
13
, PC
12
=00B :
μ
PD75112(A), 116(A)) or
=1000H-1FFFH (PC
13
, PC
12
=01B :
μ
PD75112(A), 116(A)) or
=2000H-2F7FH (PC
13
, PC
12
=10B :
μ
PD75112(A)) or
=2000H-2FFFH (PC
13
, PC
12
=10B :
μ
PD75116(A)) or
=3000H-3F7FH (PC
13
, PC
12
=11B :
μ
PD75116(A))
faddr=0000H-07FFH
taddr=0020H-007FH
(3) Description of symbols in the addressing area column
Remarks 1
: MB indicates an accessible memory bank.
2
: In
*2
, MB = 0 irrespectively of MBE and MBS.
3
: In
*4
and
*5
, MB = 15 irrespectively of MBE and
MBS.
4
:
*6
to
*10
indicate addressable areas.
(4) Description of machine cycle column
S indicates the number of machine cycles required for
the instruction having skip function to execute skip
operation. The value of S varies as follows:
When no skip ............................................. S = 0
When 1-byte or 2-byte instruction is skipped
................................................. S = 1
When 3-byte instruction (BR !addr, CALL !addr
instructions) is skipped ............................. S = 2
Note
:
GETI instruction is skipped in one-ma-
chine cycle.
One machine cycle is equal to one cycle (=t
CY
)of CPU
clock. Three values are available for the one machine
cycle by PCC setting.
*1
*2
*3
*4
*5
*6
*7
*8
*9
*10
Data Memory
Addressing
Program Memory
Addressing