22
μ
PD75206
5.8
FIP CONTROLLER/DRIVER
The FIP controller/driver of the
μ
PD75206 has the following functions:
Automatically read display data memory by means of DMA, and generate segment signals and digit
signals.
Number of display elements can be freely selected in a range of 9 to 12 segments and 9 to 16 digits,
and a total of 26 segments/digits or less.
Unused display outputs can be used as static outputs.
Luminosity can be adjusted in eight steps by a dimmer function.
Can be used for key scan.
Interrupt (IRQKS) occurs when a specified key is scanned.
Key scan data can be output from a segment output pin.
High-voltage output pins that can directly drive FIP (40 V).
Sement pins (S0-S9): V
OD
= 40 V, I
OD
= 3mA
Digit output pins (T0-T15): V
OD
= 40 V, I
OD
= 15 mA
Can be connected to pull-down resistor in bit units by mask option.
Fig. 5-8 FIP Controller/Driver Block Diagram
4
4
4
10
12
4
2
10
2
2
2
10
10
V
LOAD
T0-T9
T13/PH0-
T10/PH3
T15/S10,
T14/S11
S0-S9
Internal Bus
Segment Data Latch (12)
Display Data Memory
(48
×
4 Bits)
Key Scan Registers (KS0, KS1)
Digit Signal
Generator
IRQKS
Generator
Signal
Key Scan
Flag (KSF)
Display
Mode
Register
Digit
Select
Register
Dimmer
Select
Register
High-Voltage Output Buffer
V
PRE
Port H
Selector
4
4
4
Note
The FIP controller/driver can only operate in the high and medium speeds (PCC = 0011B or 0010B)
of the main system clock (SCC.0 = 0). It may cause errors with any other clock or in the standby mode.
Thus, be sure to stop FIP controller operation (DSPM.3 = 0) and then shift the unit to any other clock
mode or the standby mode.