參數(shù)資料
型號: UPD753017AGC-XXX-3B9
英文描述: MICROCONTROLLER|4-BIT|UPD75XL CPU|CMOS|QFP|80PIN|PLASTIC
中文描述: 單片機(jī)| 4位| UPD75XL的CPU |的CMOS | QFP封裝| 80腳|塑料
文件頁數(shù): 19/40頁
文件大?。?/td> 320K
代理商: UPD753017AGC-XXX-3B9
19
μ
PD75P048
MAIN SYSTEM CLOCK OSCILLATOR CIRCUIT CHARACTERISTICS
(T
a
= -10 to +70
°
C, V
DD
= 2.7 to 6.0 V)
Oscillator
Recommended
Constants
Item
Conditions
MIN.
TYP.
MAX.
Unit
Ceramic
Oscillation
frequency(f
X
)
Note 1
V
DD
= oscillation
voltage range
2.0
5.0
Note 3
MHz
Oscillation stabiliza-
tion time
Note 2
After V
DD
come to
MIN. value of
oscillation voltage
range
4
ms
Crystal
Oscillation
frequency (f
X
)
Note 1
2.0
4.19
5.0
Note 3
MHz
Oscillation stabiliza-
tion time
Note 2
V
DD
= 4.5 to 6.0 V
10
ms
30
ms
External Clock
X1 input frequency
(f
X
)
Note 1
2.0
5.0
Note 3
MHz
X1 input high-,
low-level widths
(t
XH
, t
XL
)
100
250
ns
Note 1.
Only to express the characteristics of the oscillator circuit. For instruction execution time, refer to
AC Characteristics.
2.
Time required for oscillation to stabilize after V
DD
has reached the minimum volue of the oscillation
voltage range or the STOP mode has been released.
3.
When the oscillation frequency is 4.19 MHz < fx
5.0 MHz, do not select PCC = 0011 as the instruction
execution time: otherwise, one machine cycle is set to less than 0.95
μ
s, falling short of the rated
minimum value of 0.95
μ
s.
Caution When using the oscillation circuit of the main system clock, wire the portion enclosed in dotted
line in the figures as follows to avoid adverse influences on the wiring capacity:
Keep the wiring length as short as possible.
Do not cross the wiring over the other signal lines.
Do not route the wiring in the vicinity of lines through which a high alternating current flows.
Always keep the ground point of the capacitor of the oscillator circuit at the same potential as
V
DD
. Do not connect the ground pattern through which a high curent flows.
Do not extract signals from the oscillation circuit.
X1
X2
C1
C2
V
DD
X1
X2
C1
C2
V
DD
X1
X2
PD74HCU04
μ
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