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參數(shù)資料
| 型號(hào)： | UPD753036 |
| 廠商： | NEC Corp. |
| 元件分類： | 4位微控制器 |
| 英文描述： | 4-BIT SINGLE-CHIP MICROCONTROLLER FOR SMALL GENERAL-PURPOSE INFRARED REMOTE CONTROL TRANSMITTER |
| 中文描述： | 4位單片機(jī)的小型通用紅外遙控器 |
| 文件頁(yè)數(shù)： | 68/88頁(yè) |
| 文件大?。?/td> | 373K |
| 代理商： | UPD753036 |
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68
μ
PD753036, 753036(A)
Data Sheet U11353EJ4V0DS00
Data retention characteristics of data memory in STOP mode and at low supply voltage
(T
A
= –40 to +85
°
C)
Parameter
Symbol
Conditions
MIN.
TYP.
MAX.
Unit
Data retention power supply
current
V
DDDR
1.8
5.5
V
Release signal setup time
t
SREL
0
μ
s
Oscillation stabilization
t
WAIT
Released by RESET
Note 2
ms
wait time
Note 1
Released by interrupt request
Note 3
ms
Notes 1.
The oscillation stabilization wait time is the time during which the CPU stops operating to prevent
unstable operation when oscillation is started.
Either 2
17
/f
X
or 2
15
/f
X
can be selected by mask option.
Set by the basic interval timer mode register (BTM). (Refer to the table below.)
2.
3.
BTM3
BTM2
BTM1
BTM0
Wait Time
f
x
= 4.19 MHz
f
x
= 6.0 MHz
–
0
0
0
2
20
/f
x
(approx. 250 ms)
2
20
/f
x
(approx. 175 ms)
–
0
1
1
2
17
/f
x
(approx. 31.3 ms)
2
17
/f
x
(approx. 21.8 ms)
–
1
0
1
2
15
/f
x
(approx. 7.81 ms)
2
15
/f
x
(approx. 5.46 ms)
–
1
1
1
2
13
/f
x
(approx. 1.95 ms)
2
13
/f
x
(approx. 1.37 ms)
Data retention timing (when STOP mode released by RESET)
Data retention timing (standby release signal: when STOP mode released by interrupt signal)
STOP mode
Data retention mode
Internal reset operation
Operation mode
STOP instruction execution
HALT mode
V
DD
RESET
t
WAIT
t
SREL
STOP mode
Data retention mode
Operation mode
HALT mode
t
SREL
t
WAIT
STOP instruction execution
V
DD
Standby release signal
(interrupt request)
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