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參數(shù)資料
| 型號(hào)： | UPD754304GS |
| 廠商： | NEC Corp. |
| 元件分類： | 4位微控制器 |
| 英文描述： | 4-BIT SINGLE-CHIP MICROCONTROLLER FOR SMALL GENERAL-PURPOSE INFRARED REMOTE CONTROL TRANSMITTER |
| 中文描述： | 4位單片機(jī)的小型通用紅外遙控器 |
| 文件頁(yè)數(shù)： | 55/74頁(yè) |
| 文件大?。?/td> | 316K |
| 代理商： | UPD754304GS |
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μ
PD754302, 754304, 754302(A), 754304(A)
55
AC Characteristics (T
A
= –40 to +85
°
C, V
DD
= 1.8 to 5.5 V)
Parameter
Symbol
Test Conditions
MIN.
TYP.
MAX.
Unit
CPU clock cycle time
Note1
t
CY
When system
V
DD
= 2.7 to 5.5 V
0.67
64
μ
s
(Minimum instruction execution
clock is used
time = 1 machine cycle)
0.95
64
μ
s
TI0, TI1 input frequency
f
TI
V
DD
= 2.7 to 5.5 V
0
1
MHz
0
275
kHz
TI0, TI1 input high- and
t
TIH
, t
TIL
V
DD
= 2.7 to 5.5 V
0.48
μ
s
low-level width
1.8
μ
s
Interrupt input high- and
t
INTH
, t
INTL
INT0
IM02 = 0
Note 2
μ
s
low-level width
IM02 = 1
10
μ
s
INT1, 2, 4
10
μ
s
KR0-7
10
μ
s
RESET low-level width
t
RSL
10
μ
s
Notes 1.
The CPU clock (
Φ
) cycle time (minimum
instruction execution time) is determined
by the ocillation frequency of the con-
nected resonator and the processor
clock control register (PCC). The figure
on the right shows the cycle time t
CY
characteristics against the supply voltage
V
DD
when the system clock is used.
2t
CY
or 128/fx depending on the setting of
the interrupt mode register (IM0).
2.
0.50
1
2
3
4
5
6
1
2
3
4
5
6
60
64
Supply voltage V
DD
[V]
(During system clock operation)
t
CY
vs V
DD
Operation
guaranteed range
C
C
[
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| UPD7554AG-597-E2 | 制造商:Renesas Electronics Corporation 功能描述: |
| UPD7554AG-597-E2-A | 制造商:Renesas Electronics Corporation 功能描述: |
| UPD7554AG-603-E2 | 制造商:Renesas Electronics Corporation 功能描述: |
| UPD7554AG-603-E2-A | 制造商:Renesas Electronics Corporation 功能描述: |
| UPD7554AG-611-E2 | 制造商:Renesas Electronics Corporation 功能描述: |
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