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參數(shù)資料
| 型號： | UPD75P0116GB-3BS-MTX |
| 廠商： | NEC Corp. |
| 英文描述： | RECTIFIER BRIDGE 1.5A 200V 50A-ifsm 1V-vf 5uA-ir WOG 1K/BULK |
| 中文描述： | 4位單片機 |
| 文件頁數(shù)： | 14/40頁 |
| 文件大?。?/td> | 320K |
| 代理商： | UPD75P0116GB-3BS-MTX |
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14
μ
PD75P048
3. PROM (PROGRAM MEMORY) WRITE AND VERIFY
The
μ
PD75P048 contains 8064 bytes of PROM. The following table shows the pin functions during the write
and verify cycles. Note that it is not necessary to enter an address, because the address is updated by pulsing
the X1 clock pins.
Pin Name
V
PP
X1, X2
MD0 - MD3 (P30 - P33)
P40 - P43 (lower 4 bits)
P50 - P53 (higher 4 bits)
V
DD
Function
Normally 2.7 to 6 V; 12.5 V is applied during write/verify
After a write/verify write, the X1 and X2 clock pins are
pulsed. The inverted signal of the X1 should be input to the
X2.
Note that these pins are also pulsed during a read.
Operation mode selection pins.
8-bit data input/output pins for write and verify
Supply voltage.
Normally 2.7 to 6 V; 6 V is applied during write/verify
Caution The
μ
PD75P048CW/GC do not have a UV erase window, thus the PROM contents cannot be erased
with ultra-violet ray.
3.1 PROM WRITE AND VERIFY OPERATION MODE
When 6 V and 12.5 V are applied to the V
DD
and V
PP
pins, respectively, the PROM is placed in the write/verify
mode. The operation is selected by the MD0 to MD3 pins, as shown in the table.
The other pins should be returned to V
SS
potential via pull-down resistors.
Operation Mode Specification
V
PP
+12.5 V
V
DD
+6 V
MD0
H
L
L
H
MD1
L
H
L
×
MD2
H
H
H
H
MD3
L
H
H
H
Operation Mode
Clear program memory address to 0
Write mode
Verify mode
Program inhibit
×
: Don’t care.
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