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參數(shù)資料
| 型號： | UPD77018 |
| 廠商： | NEC Corp. |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | 16 bits, Fixed-point Digital Signal Processor |
| 中文描述： | 16位定點數(shù)字信號處理器 |
| 文件頁數(shù)： | 16/60頁 |
| 文件大?。?/td> | 424K |
| 代理商： | UPD77018 |
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μ
PD77015, 77017, 77018
16
2. FUNCTIONS
2.1 Pipeline Processing
This section describes the
μ
PD77017 pipeline processing.
2.1.1 Outline
The
μ
PD77017 basic operations are executed in following 3-stage pipeline.
(1) instruction fetch; if
(2) Instruction decoding; id
(3) execution; ex
When the
μ
PD77017 operates a result of a instruction just executed before, the data is input to ALU in parallel
with written back to general registers. Pipeline processing actualizes programming without delay time to execute
instructions and write back data. Three successive instructions and their processing timing are shown below.
Pipeline Processing Timing
2.1.2 Instructions with Delay
The following instructions have delay time in execution.
(1) Instructions to control interrupt
2 instruction cycles have been taken between instruction fetch and execution.
(2) Inter-register transfer instructions and immediate data set instructions
When data is set in data pointer, it needs 2 instruction cycles before the data is valid.
if1
id1
ex1
if2
id2
ex2
if3
id3
ex3
1 instruction cycle
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