參數(shù)資料
型號(hào)： UPD77113AF1-XXX-CN1
廠商： NEC Corp.
英文描述： MOS INTEGRATED CIRCUIT
中文描述： 馬鞍山集成電路
文件頁(yè)數(shù)： 13/62頁(yè)
文件大小： 352K
代理商： UPD77113AF1-XXX-CN1
Data Sheet U14373EJ3V0DS
13
μ
PD77113A, 77114
Host interface
Pin No.
Pin Name
100-pin TQFP
80-pin BGA
I/O
Function
Shared by:
HA1
72
B8
Input
Specifies the register to be accessed by HD7
through HD0.
1: Accesses the host interface status
register (HST).
0: Accesses the host transmit data register
(HDT (out)) when read (HRD = 0), and
host receive data register (HDT (in))
when written (HWR = 0).
HA0
71
C8
Input
Specifies the register to be accessed by HD7
through HD0.
1: Accesses bits 15 through 8 of HST, HDT
(in), and HDT (out).
0: Accesses bits 7 through 0 of HST, HDT
(in), and HDT (out).
HCS
68
E6
Input
Chip select input
HRD
69
D8
Input
Host read input
HWR
70
D7
Input
Host write input
HRE
66
Output
Host read enable output
HWE
67
Output
Host write enable output
HD0 - HD7
63 - 56
F5, E8, E9, F7,
G6, F9, F8, H8
I/O
(3S)
8-bit host data bus
Remark
The pins marked “3S” under the heading “I/O” go into a high-impedance state when the host interface is
not being accessed.
I/O ports
Pin No.
Pin Name
100-pin TQFP
80-pin BGA
I/O
Function
Shared by:
P0
55
H7
I/O
P1
54
G8
I/O
P2
53
G7
I/O
P3
52
H6
I/O
General-purpose I/O port
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