
18
User’s Manual U16504EE1V1UD00
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Receive Identifier ......................................................................................................274
Receive Data ............................................................................................................275
Identifier Compare with Mask....................................................................................277
Control Bits for Mask Identifier .................................................................................278
Mask Identifier ..........................................................................................................279
CAN Control Register (1/2) .......................................................................................280
DCAN Support...........................................................................................................281
Time Stamp Function ................................................................................................283
SOFOUT Toggle Function.........................................................................................283
Global Time System Function ...................................................................................283
CAN Error Status Register (1/3) ............................................................................... 284
Transmit Error Counter .............................................................................................287
Receive Error Counter ..............................................................................................287
Message Count Register (MCNT) (1/2) ....................................................................288
Bit Rate Prescaler (1/2) ............................................................................................ 290
Synchronization Control Registers 0 and 1 (1/2) ..................................................... 292
Transmit Control Register (1/2) ................................................................................296
Receive Message Register .......................................................................................298
Mask Control Register (1/2) ......................................................................................299
Redefinition Control Register (1/2) ...........................................................................302
Initialization Flow Chart .............................................................................................309
Transmit Preparation.................................................................................................310
Transmit Abort...........................................................................................................311
Handling of Semaphore Bits by DCAN-Module.........................................................312
Receive with Interrupt, Software Flow.......................................................................313
Receive, Software Polling..........................................................................................314
LCD Controller/Driver Block Diagram........................................................................ 316
LCD Clock Select Circuit Block Diagram...................................................................316
LCD Display Mode Register (LCDM) Format............................................................317
LCD Display Control Register (LCDC) Format..........................................................318
Relationship between LCD Display Data Memory Contents
and Segment/Common Outputs319
Common Signal Waveform........................................................................................321
Common Signal and Segment Signal Voltages and Phases.....................................321
Example of Connection of LCD Drive Power Supply (1/2)........................................ 322
4-Time-Division LCD Display Pattern and Electrode Connections............................324
4-Time-Division LCD Panel Connection Example..................................................... 325
4-Time-Division LCD Drive Waveform Examples (1/3 Bias Method) ........................326
LCD Timer Control Register (LCDTM) Format..........................................................327
Sound Generator Block Diagram............................................................................... 329
Concept of Each Signal.............................................................................................330
Sound Generator Control Register (SGCR) Format (1/2) .........................................331
Sound Generator Buzzer Control Register (SGBR) Format......................................333
Sound Generator Amplitude Register (SGAM) Format.............................................334
Sound Generator Output Operation Timing...............................................................335
Sound Generator Output Operation Timing...............................................................336
Meter Controller/Driver Block Diagram......................................................................337
1-bit Addition Circuit Block Diagram..........................................................................338
Timer Mode Control Register (MCNTC) Format........................................................341
Compare Control Register n (MCMPCn) Format ......................................................342
Port Mode Control Register (PMC) Format (1/2).......................................................343
Meter Controller/Driver Clock Register (SMSWI) Format..........................................345
Restart Timing after Count Stop (Count Start Count Stop Count Start)...........346
Update of PWM data.................................................................................................347
Timing in 1-bit Addition Circuit Operation.................................................................. 348
Timing of Output with 1 Clock Shifted .......................................................................349
Basic Configuration of Interrupt Function (1/2)..........................................................353
Interrupt Request Flag Register Format....................................................................356
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