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| 型號(hào)： | UPD780826A |
| 廠商： | NEC Corp. |
| 元件分類： | 8位微控制器 |
| 英文描述： | 8-bit Microcontroller with 2/4/8K Bytes In-System Programmable Flash |
| 中文描述： | 8位微控制器與2/4/8K字節(jié)在系統(tǒng)可編程閃存 |
| 文件頁(yè)數(shù)： | 16/472頁(yè) |
| 文件大?。?/td> | 4896K |
| 代理商： | UPD780826A |
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16
User’s Manual U16504EE1V1UD00
Figure 6-6:
Timing of Pulse Width Measurement Operation by Using the Free Running
Counter and One Capture Register (with Both Edges Specified)..............................120
CR2m Capture Operation with Rising Edge Specified.............................................. 121
Timing of Pulse Width Measurement Operation by Free Running Counter
(with Both Edges Specified) ......................................................................................122
16-Bit Timer Register Start Timing............................................................................123
Capture Register Data Retention Timing...................................................................123
8-Bit Timer/Event Counter 50 Block Diagram............................................................129
8-Bit Timer/Event Counter 51 Block Diagram............................................................130
Block Diagram of 8-Bit Timer/Event Counters 50 and 51 Output Control Circuit......130
Timer Clock Select Register 50 Format.....................................................................132
Timer Clock Select Register 51 Format.....................................................................133
8-Bit Timer Mode Control Register 50 Format........................................................... 134
8-Bit Timer Mode Control Register 51 Format (1/2)..................................................135
Port Mode Register 3 Format....................................................................................136
Port Mode Register 9 Format....................................................................................137
8-Bit Timer Mode Control Register Settings for Interval Timer Operation.................138
Interval Timer Operation Timings (1/3)......................................................................139
8-Bit Timer Mode Control Register Setting for External Event Counter Operation....143
External Event Counter Operation Timings (with Rising Edge Specified).................143
8-Bit Timer Mode Control Register Settings for Square-Wave Output Operation.....144
Square-wave Output Operation Timing.....................................................................145
8-Bit Timer Control Register Settings for PWM Output Operation ............................146
PWM Output Operation Timing (Active high setting).................................................147
PWM Output Operation Timings (CRn0 = 00H, active high setting) .........................147
PWM Output Operation Timings (CRn = FFH, active high setting)........................... 148
PWM Output Operation Timings (CRn changing, active high setting).......................148
8-Bit Timer Mode Control Register Settings for 16-Bit Interval Timer Operation.......149
16-Bit Resolution Cascade Mode (with TM50 and TM51).........................................151
8-bit Timer Registers 50 and 51 Start Timings..........................................................153
External Event Counter Operation Timings...............................................................153
Timings after Compare Register Change during Timer Count Operation .................154
8-Bit Timer/Event Counter 52 Block Diagram............................................................156
Timer Clock Select Register 52 Format.....................................................................157
8-Bit Timer Output Control Register Format..............................................................158
8-Bit Timer Mode Control Register Settings for Interval Timer Operation.................159
Interval Timer Operation Timings (1/3)......................................................................159
Block Diagram of Watch Timer..................................................................................163
Watch Timer Mode Control Register (WTM) Format (1/2) ........................................ 165
Operation Timing of Watch Timer/Interval Timer.......................................................168
Watchdog Timer Block Diagram................................................................................171
Timer Clock Select Register 2 Format.......................................................................172
Watchdog Timer Mode Register Format ...................................................................173
Remote Controlled Output Application Example.......................................................177
Clock Output Control Circuit Block Diagram..............................................................178
Timer Clock Select Register 0 Format.......................................................................179
Port Mode Register 6 Format....................................................................................180
A/D Converter Block Diagram ...................................................................................181
Power-Fail Detection Function Block Diagram..........................................................182
A/D Converter Mode Register (ADM1) Format..........................................................184
Analog Input Channel Specification Register (ADS1) Format...................................185
Power-Fail Compare Mode Register (PFM) Format..................................................186
Power-fail compare threshold value register (PFT)...................................................186
Basic Operation of 8-Bit A/D Converter.....................................................................187
Relation between Analog Input Voltage and A/D Conversion Result........................189
A/D Conversion ......................................................................................................... 191
Example Method of Reducing Current Consumption in Standby Mode....................192
Analog Input Pin Handling.........................................................................................193
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