參數(shù)資料
型號: UPD78320L
廠商: NEC Corp.
英文描述: 16/8-BIT SINGLE-CHIP MICROCONTROLLER
中文描述: 16/8-BIT單片機
文件頁數(shù): 33/88頁
文件大?。?/td> 479K
代理商: UPD78320L
33
μ
PD78320, 78322
3.6
CLOCK GENERATOR
The clock generator generates and controls internal system clocks (CLK) supplied to the CPU.
It is configured as shown in Figure 3-1.
Remarks
1.
2.
3.
f
XX
: Crystal oscillator frequency
f
X
: External clock frequency
f
CLK
:
Internal system clock frequency
The system clock oscillator oscillates by a crystal resonator connected to X1 and X2 pins. It stops oscillating when set
to the standby mode (STOP).
External clocks can be input to the system clock oscillator. In such cases, input a clock signal to the X1 pin and input
the inverted clock signal to the X2 pin. The X2 pin can also be left open.
Caution When using external clocks, do not set the STBC STP bit.
The divider generates internal system clocks (f
CLK
) by dividing a system clock oscillator output (fxx for crystal oscillation
and fx for external clocks) into two parts.
X1
X2
STOP Mode
f
XX
or f
X
1/2
f
CLK
Internal System
Clock (CLK)
Divider
System
Clock
Generator
Figure 3-1. Clock Generator Block Diagram
相關(guān)PDF資料
PDF描述
UPD78322 16/8-BIT SINGLE-CHIP MICROCONTROLLER
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