參數(shù)資料
型號: UPD78323GJ-5BJ
廠商: NEC Corp.
英文描述: 16/8-BIT SINGLE-CHIP MICROCONTROLLER
中文描述: 16/8-BIT單片機
文件頁數(shù): 40/86頁
文件大小: 454K
代理商: UPD78323GJ-5BJ
40
μ
PD78323, 78324
3.10 WATCHDOG TIMER
The watchdog timer is used to prevent program overrun and deadlock. Normal operation of the program or system can
be confirmed by checking that no watchdog timer interrupt has been generated. Thus, an instruction to clear the watchdog
timer (timer start) is set into each program module.
If the watchdog timer clear instruction is not cleared within the time period set into the watchdog timer and the watchdog
timer overflows, a watchdog timer interrupt is generated, and a low level is generated to WDTO pin, thereby notifying of
an error in the program.
The watchdog timer can also be used to maintain the oscillation stabilizing time of the oscillator after the stop mode has
been released.
Figure 3-8 shows the watchdog timer configuration.
Figure 3-8. Watchdog Timer Configuration
f
CLK
/2
8
f
CLK
/2
10
f
CLK
/2
12
Watchdog Timer (8 Bits)
Clear
Timer (5 Bits)
Oscillation Stabilizing
Time Controller
INTWDT
WDTO
WDT CLR
WDT STOP
Overflow
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