
51
μ
PD78361A, 78362A
7.
INSTRUCTION SET
Describe an operand in the operand field of each instruction according to the description method of the
instruction (for details, refer to the Assembler Specifications). Some instructions have two or more
operands. Select one of them. Uppercase characters, +, –, #, $, !, [, and ] are keywords and must be
described as is.
Describe an appropriate numeric value or label as immediate data. To describe a label, be sure to
describe #, $, !, [, or ].
Table 7-1. Operand Representation and Description
Description
R0, R1, R2, R3, R4, R5, R6, R7, R8, R9, R10, R11, R12, R13, R14, R15
R0, R1, R2, R3, R4, R5, R6, R7
C, B
RP0, RP1, RP2, RP3, RP4, RP5, RP6, RP7
RP0, RP1, RP2, RP3, RP4, RP5, RP6, RP7
DE, HL, VP, UP
Special function register symbol (Refer to
Table 2-1
.)
Special function register symbol (register that can be manipulated in 16-bit units. Refer to
Table
2-1
.)
RP0, RP1, RP2, RP3, RP4, RP5/PSW, RP6, RP7
(More than one symbol can be described. However, RP5 can be described only for PUSH and
POP instructions, and PSW can be described only for PUSHU and POPU instructions.)
[DE], [HL], [DE +], [HL +], [DE –], [HL –], [VP], [UP]
[DE + A], [HL + A], [DE + B], [HL + B], [VP + DE], [VP + HL]
[DE + byte], [HL + byte], [VP + byte], [UP + byte], [SP + byte] ; based mode
word[A], word[B], word[DE], word[HL]
; register indirect mode
; based indexed mode
; indexed mode
FE20H-FF1FH immediate data or label
FE20H-FF1EH immediate data (however, bit0 = 0) or label (manipulated in 16-bit units)
0000H-FDFFH immediate data or label; relative addressing
0000H-FDFFH immediate data or label; immediate addressing
(However, up to FFFFH can be described for MOV instruction. Only FE00H-FEFFH can be
described for MOVTBLW instruction.)
800H-FFFH immediate data or label
40H-7EH immediate data (however, bit0 = 0)
Note
or label
16-bit immediate data or label
8-bit immediate data or label
3-bit immediate data or label
3-bit immediate data (0-7)
Representation
r
r1
r2
rp
rp1
rp2
sfr
sfrp
post
mem
saddr
saddrp
$ addr16
! addr16
addr11
addr5
word
byte
bit
n
Note
Do not access bit0 = 1 (odd address) in word units.
Remarks
1.
rp and rp1 are the same in terms of register name that can be described but are different in code
to be generated.
r, r1, rp, rp1, and post can be described in absolute name (R0-R15, RP0-RP7) and function name
(X, A, C, B, E, D, L, H, AX, BC, DE, HL, VP, and UP).
Immediate addressing can address the entire space. Relative addressing can address only a
range of –128 to +127 from the first address of the next instruction.
2.
3.