
μ
PD78P4038Y
22
(1) Read mode
Set CE to L and OE to L to set read mode.
(2) Output disable mode
Set OE to H to set high impedance for data output and output disable mode.
Consequently, if several
μ
PD78P4038Y devices are connected to a data bus, the OE pins can be controlled to
select data output from any of the devices.
(3) Standby mode
Set CE to H to set standby mode.
In this mode, data output is set to high impedance regardless of the OE setting.
(4) Page data latch mode
At the beginning of page write mode, set CE to H, PGM to H, and OE to L to set page data latch mode.
In this mode, 1 page (4 bytes) of data are latched to the internal address/data latch circuit.
(5) Page write mode
After latching the address and data for one page (4 bytes) using page data latch mode, adding a 0.1 ms program
pulse (active, low) to the PGM pin with both CE and OE set to H causes page write to be executed. Later, setting
both CE and OE to L causes program verification to be executed.
If programming is not completed after one program pulse, the write and verify operations may be repeated X times
(where X
≤
10).
(6) Byte write mode
Adding a 0.1 ms program pulse (active, low) to the PGM pin with both CE and OE set to H causes byte write
to be executed. Later, setting OE to L causes program verification to be executed.
If programming is not completed after one program pulse, the write and verify operations may be repeated X times
(where X
≤
10).
(7) Program verify mode
Set CE to L, PGM to H, and OE to L to set program verify mode. Use verify mode for verification following each
write operation.
(8) Program inhibit mode
Program inhibit mode is used to write to a single device when several
μ
PD78P4038Y devices are connected in
parallel to OE , V
PP
, and D0 to D7 pins.
Use the page write mode or byte write mode described above for each write operation. Write operations cannot
be done for devices in which the PGM pin has been set to H.