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參數(shù)資料
| 型號： | uPSD3234(中文) |
| 廠商： | 意法半導體 |
| 英文描述： | Flash Programmable System Device with 8032 Microcontroller Core(嵌入高速“8032微控制器核”的Flash型可編程系統(tǒng)器) |
| 中文描述： | 閃存可編程系統(tǒng)器件與8032微控制器內(nèi)核（嵌入高速“8032微控制器核”的閃存型可編程系統(tǒng)器） |
| 文件頁數(shù)： | 33/45頁 |
| 文件大?。?/td> | 1308K |
| 代理商： | UPSD3234(中文) |
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|25] p4_4 cntl0 [65| _rd, LCD_d4 ,Peripheral I/O Mode
|26] pa4 pb7 [66| LCD_e
PWM0 |27] p4_3 pb6 [67| LCD_rw, LCD_d3 ,Peripheral I/O Mode
|28] pa3 Reset_In [68| Reset_In
|29] GND GND [69|
|30] p4_2 Vref [70| VREF
|31] p4_1 N/C [71| LCD_d2 ,Peripheral I/O Mode
|32] pa2 pb5 [72| LCD_rs
|33] p4_0 pb4 [73| term_count, LCD_d1 ,Peripheral I/O Mode
|34] pa1 pb3 [74| a15_x, LCD_d0 ,Peripheral I/O Mode
|35] pa0 p3_0 [75| USART1_Rxd, a0, Address Bus A0/Data Port D0
|36] adio0 pb2 [76| a14_x, a1, Address Bus A1/Data Port D1
|37] adio1 p3_1 [77| USART1_Txd, a2, Address Bus A2/Data Port D2
|38] adio2 pb1 [78| a13_x, a3, Address Bus A3/Data Port D3
|39] adio3 p3_2 [79|
|40] p3_4 pb0 [80| a12_x
| |
-----------------------------
==== Global Configuration ====
Data Bus : 8-Bit
Address/Data Mode : Multiplexed
ALE/AS Signal : Active High
Control Signals : /WR, /RD, /PSEN
Main PSD Flash memory will reside in this space at power-up : Data space
Secondary PSD Flash memory will reside in this space at power-up : Program space
Enable Chip-Select Input(/CSI) : OFF
Standby Voltage Input (PC2) : OFF
Standby-on Indicator (PC4) : OFF
RDY/Busy function (PC3) : OFF
Load Micro-Cell on : edge
Security Protection : OFF
==== DataBus_IMC access information ====
CSIOP
Location Address Offset Register Name Signals
--------------------------------------------------------
===== Resource Usage Summary =====
Total Product Terms Used: 71
Device Resources used / total
------------------------------------------------
Port A: (pins 35 34 32 28 26 24 22 21)
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