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    參數(shù)資料
    型號: UPSD3254B-24U1
    廠商: 意法半導體
    元件分類: 8位微控制器
    英文描述: 8-bit Microcontroller with 2/4/8K Bytes In-System Programmable Flash
    中文描述: 8位微控制器與2/4/8K字節(jié)在系統(tǒng)可編程閃存
    文件頁數(shù): 115/176頁
    文件大小: 1214K
    代理商: UPSD3254B-24U1
    115/176
    μPSD325X DEVICES
    – If a Reset Flash instruction is received, data in
    the Flash memory sector that was being erased
    is invalid.
    Resume Sector Erase.
    If a Suspend Sector
    Erase instruction was previously executed, the
    erase cycle may be resumed with this instruction.
    The Resume Sector Erase instruction consists of
    writing 030h to any address while an appropriate
    Sector Select (FS0-FS7 or CSBOOT0-CSBOOT3)
    is High. (See Table 85.)
    Specific Features
    Flash Memory Sector Protect.
    Each
    and secondary Flash memory sector can be sepa-
    rately protected against Program and Erase cy-
    cles. Sector Protection provides additional data
    security because it disables all Program or Erase
    cycles. This mode can be activated through the
    JTAG Port or a Device Programmer.
    primary
    Sector protection can be selected for each sector
    using the PSDsoft Express Configuration pro-
    gram. This automatically protects selected sectors
    when the device is programmed through the JTAG
    Port or a Device Programmer. Flash memory sec-
    tors can be unprotected to allow updating of their
    contents using the JTAG Port or a Device Pro-
    grammer. The MCU can read (but cannot change)
    the sector protection bits.
    Any attempt to program or erase a protected Flash
    memory sector is ignored by the device. The Verify
    operation results in a READ of the protected data.
    This allows a guarantee of the retention of the Pro-
    tection status.
    The sector protection status can be read by the
    MCU through the Flash memory protection regis-
    ters (in the CSIOP block). See Table 87 and Table
    88.
    Table 87. Sector Protection/Security Bit Definition – Flash Protection Register
    Note: 1. Bit Definitions:
    Sec<i>_Prot
    1 = Primary Flash memory or secondary Flash memory Sector <i> is write-protected.
    Sec<i>_Prot
    0 = Primary Flash memory or secondary Flash memory Sector <i> is not write-protected.
    Table 88. Sector Protection/Security Bit Definition – Secondary Flash Protection Register
    Note: 1. Bit Definitions:
    Sec<i>_Prot
    1 = Secondary Flash memory Sector <i> is write-protected.
    Sec<i>_Prot
    0 = Secondary Flash memory Sector <i> is not write-protected.
    Security_Bit
    0 = Security Bit in device has not been set.
    1 = Security Bit in device has been set.
    Bit 7
    Bit 6
    Bit 5
    Bit 4
    Bit 3
    Bit 2
    Bit 1
    Bit 0
    Sec7_Prot
    Sec6_Prot
    Sec5_Prot
    Sec4_Prot
    Sec3_Prot
    Sec2_Prot
    Sec1_Prot
    Sec0_Prot
    Bit 7
    Bit 6
    Bit 5
    Bit 4
    Bit 3
    Bit 2
    Bit 1
    Bit 0
    Security_Bit
    not used
    not used
    not used
    Sec3_Prot
    Sec2_Prot
    Sec1_Prot
    Sec0_Prot
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