參數(shù)資料
型號: UPSD3254B-40U6T
廠商: 意法半導(dǎo)體
英文描述: Flash Programmable System Devices with 8032 Microcontroller Core and 256Kbit SRAM
中文描述: 閃存可編程系統(tǒng)設(shè)備與8032微控制器核心和256Kbit的SRAM
文件頁數(shù): 40/176頁
文件大?。?/td> 1214K
代理商: UPSD3254B-40U6T
μPSD325X DEVICES
40/176
USART Interrupt
I
The USART interrupt is generated by RI
(receive interrupt) OR TI (transmit interrupt).
I
When the USART interrupt is generated, the
corresponding request flag must be cleared by
software. The interrupt service routine will have
to check the various USART registers to
determine the source and clear the
corresponding flag.
I
Both USART’s are identical, except for the
additional interrupt controls in the Bit 4 of the
additional interrupt control registers (A7H, B7H)
Figure 16. Interrupt System
AI06646
INT0
USART
Timer
0
I2C
INT1
DDC
Timer
1
USB
2nd
USART
Timer
2
High
Low
I
Interrupt
Sources
IE /
IP / IPA Priority
Global
Enable
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