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CHAPTER 19 ASSEMBLER RESERVED WORDS
262
Register file (control register)
(1/2)
Symbol Name
Attribute
Value
Read/Write
Description
SP
MEM
0.81H
R/W
Stack pointer
SIOEN
FLG
0.8AH.0
R
SIO enable flag
INT
FLG
0.8FH.0
R/W
INT pin status flag
PDRESEN
FLG
0.90H.0
R/W
Power-down reset enable flag
....TMEN
FLG
0.91H.3
R/W
Timer enable flag
....TMRES
FLG
0.91H.2
R/W
Timer reset flag
....TMCK1
FLG
0.91H.1
R/W
Timer source clock selection flag bit 1
TMCK0
FLG
0.91H.0
R/W
Timer source clock selection flag bit 0
TMOSEL
FLG
0.92H.0
R/W
Timer output port/port selection flag
....SIOTS
FLG
0.9AH.3
R/W
SIO start flag
....SIOHIZ
FLG
0.9AH.2
R/W
SO pin status
....SIOCK1
FLG
0.9AH.1
R/W
SIO source clock selection flag bit 1
SIOCK0
FLG
0.9AH.0
R/W
SIO source clock selection flag bit 0
....CMPCH1
FLG
0.9CH.1
R/W
Comparator input channel selection flag bit 1
CMPCH0
FLG
0.9CH.0
R/W
Comparator input channel selection flag bit 0
....CMPVREF3
FLG
0.9DH.3
R/W
Comparator reference voltage selection flag bit 3
....CMPVREF2
FLG
0.9DH.2
R/W
Comparator reference voltage selection flag bit 2
....CMPVREF1
FLG
0.9DH.1
R/W
Comparator reference voltage selection flag bit 1
CMPVREF0
FLG
0.9DH.0
R/W
Comparator reference voltage selection flag bit 0
....CMPSTRT
FLG
0.9EH.1
R
Comparator start flag
CMPRSLT
FLG
0.9EH.0
R/W
Comparator comparison result flag
IEGMD1
..................................................................................................................................................................................
FLG
0.9FH.1
R/W
INT pin edge detection selection flag bit 1
IEGMD0
FLG
0.9FH.0
R/W
INT pin edge detection selection flag bit 0
....P0C3IDI
FLG
0.A3H.3
R/W
P0C
3
input port disable flag (P0C
3
/Cin
3
selection)
....P0C2IDI
FLG
0.A3H.2
R/W
P0C
2
input port disable flag (P0C
2
/Cin
2
selection)
....P0C1IDI
FLG
0.A3H.1
R/W
P0C
1
input port disable flag (P0C
1
/Cin
1
selection)
P0C0IDI
FLG
0.A3H.0
R/W
P0C
0
input port disable flag (P0C
0
/Cin
0
selection)
P0BGIO
FLG
0.A4H.0
R/W
P0B group input/output selection flag (1= all P0Es are
output ports.)
FLG
0.AFH.2
R/W
SIO interrupt flag
FLG
0.AFH.1
R/W
Timer interrupt enable flag
IP
FLG
0.AFH.0
R/W
INT pin interrupt enable flag
....P0EBIO1
FLG
0.B2H.1
R/W
P0E
1
input/output selection flag (1=output port)
P0EBIO0
FLG
0.B2H.0
R/W
P0E
0
input/output selection flag (1=output port)
....P0DBIO3
FLG
0.B3H.3
R/W
P0D
3
input/output selection flag (1=output port)
....P0DBIO2
FLG
0.B3H.2
R/W
P0D
2
input/output selection flag (1=output port)
....P0DBIO1
FLG
0.B3H.1
R/W
P0D
1
input/output selection flag (1=output port)
P0DBIO0
FLG
0.B3H.0
R/W
P0D
0
input/output selection flag (1=output port)
....IPSIO
....IPTM