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參數(shù)資料
| 型號(hào)： | USB3450 |
| 廠商： | SMSC Corporation |
| 英文描述： | HI-SPEED USB HOST OR DEVICE PHY WITH UTMI+INTERFACE |
| 中文描述： | 高速USB主機(jī)或設(shè)備與UTMI接口物理層 |
| 文件頁數(shù)： | 35/40頁 |
| 文件大?。?/td> | 1086K |
| 代理商： | USB3450 |
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Hi-Speed USB Host or Device PHY With UTMI+ Interface
Datasheet
SMSC USB3450
35
Revision 0.1 (05-11-05)
DATASHEET
Notes:
■
T0 may be up to 4ms after HS Reset T0.
■
The Link must use LINESTATE to detect the downstream port chirp sequence.
■
Due to the assertion of the HS termination on the host port and FS termination on the device port,
between T1 and T7 the signaling levels on the bus are higher than HS signaling levels and are
less than FS signaling levels.
7.10
HS Detection Handshake – Suspend Timing
If reset is entered from a suspended state, the internal oscillator and clocks of the transceiver are
assumed to be powered down.
Figure 7.6
shows how CLKOUT is used to control the duration of the
chirp generated by the device.
When reset is entered from a suspended state (J to SE0 transition reported by LINESTATE),
SUSPENDN is combinatorially negated at time T0 by the Link. It takes approximately 5 milliseconds
for the transceiver's oscillator to stabilize. The device does not generate any transitions of the CLKOUT
signal until it is “usable” (where “usable” is defined as stable to within ±10% of the nominal frequency
and the duty cycle accuracy 50±5%).
The first transition of CLKOUT occurs at T1. The Link then sets OPMODE to
Disable Bit Stuffing and
NRZI encoding
, XCVRSELECT to HS mode, and must assert a Chirp K for 66000 CLKOUT cycles to
ensure a 1ms minimum duration. If CLKOUT is 10% fast (66MHz) then Chirp K will be 1.0ms. If
CLKOUT is 10% slow (54 MHz) then Chirp K will be 1.2ms. The 5.6ms requirement for the first
CLKOUT transition after SUSPENDN, ensures enough time to assert a 1ms Chirp K and still complete
before T3. Once the Chirp K is completed (T3) the Link can begin looking for host chirps and use
CLKOUT to time the process. At this time, the device follows the same protocol as in
Section 7.9, "HS
Detection Handshake – HS Downstream Facing Port"
for completion of the High Speed Handshake.
Figure 7.6 HS Detection Handshake Timing Behavior from Suspend
CLK60
Look for host chirps
Device Chirp K
SUSPENDN
DP/DM
TERMSELECT
TXVALID
SE0
J
CLK power up time
XCVRSELECT
OPMODE 1
OPMODE 0
time
T0
T3
T4
T1
T2
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| USB3450-FZG | HI-SPEED USB HOST OR DEVICE PHY WITH UTMI+INTERFACE |
| USB97C201 | USB 2.0 ATA/ ATAPI Controller |
| USB97C201-MC | USB 2.0 ATA/ ATAPI Controller |
| USB97C201-MN | USB 2.0 ATA/ ATAPI Controller |
| USB97CFDC-MN | USB FLOPPY DISK CONTROLLER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| USB3450-FZG | 功能描述:接口 - 專用 USB 2.0 PHY UTMI RoHS:否 制造商:Texas Instruments 產(chǎn)品類型:1080p60 Image Sensor Receiver 工作電源電壓:1.8 V 電源電流:89 mA 最大功率耗散: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:BGA-59 |
| USB-3488A | 功能描述:數(shù)據(jù)記錄與采集 HIGH PERF IEEE-488 USB DAQ GPIB INT CON RoHS:否 制造商:Lantronix 描述/功能:Analog device server 顯示器類型:None 電流額定值: |
| USB3500 | 制造商:SMSC 制造商全稱:SMSC 功能描述:Hi-Speed USB Host, Device or OTG PHY With UTMI+ Interface |
| USB3500-ABZJ | 功能描述:接口 - 專用 USB 2.0 PHY UTMI RoHS:否 制造商:Texas Instruments 產(chǎn)品類型:1080p60 Image Sensor Receiver 工作電源電壓:1.8 V 電源電流:89 mA 最大功率耗散: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:BGA-59 |
| USB3503 | 制造商:SMSC 制造商全稱:SMSC 功能描述:USB 2.0 HSIC High-Speed Hub Controller Optimized for Portable Applications |
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