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參數(shù)資料
| 型號： | USB97CFDC-MN |
| 廠商： | STANDARD MICROSYSTEMS CORP |
| 元件分類： | 存儲控制器/管理單元 |
| 英文描述： | USB FLOPPY DISK CONTROLLER |
| 中文描述： | 1 Mbps, FLOPPY DISK DRIVE CONTROLLER, PQFP100 |
| 封裝： | 12 X 12 MM, TQFP-100 |
| 文件頁數(shù)： | 36/59頁 |
| 文件大小： | 385K |
| 代理商： | USB97CFDC-MN |
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SMSC DS – USB97C201
Page 36
Rev. 03/25/2002
PRELIMINARY
BIT
[7:2]
1
0
NAME
Reserved
512Bytes
COUNT8
R/W
R
R
R
DESCRIPTION
This bit always reads “0”.
1 = Indicates that 512 bytes were transferred
Bit 8 of the byte count for the data transferred.
Table 43 – RAM Buffer Write Byte Count Register B2 Register
RAMWRBC_B2
(0xD2 - RESET=0x00)
NAME
R/W
COUNT[7:0]
R
Bits 7 thru 0 the byte count of the data transferred to SRAM.
The packet is stored beginning at address 0x0300.
RAM BUFFER WRITE BYTE COUNT REGISTER B2
BIT
[7:0]
DESCRIPTION
Table 44 – RAM Buffer Read Byte Count Register A1
RAMRDBC_A1
(0xD3 - RESET=0x00)
NAME
R/W
Reserved
R
This bit always reads “0”.
512Bytes
R/W
1 = Indicates that 512 bytes are to transferred
COUNT8
R/W
Bit 8 of the byte count for the data to be transferred.
RAM BUFFER READ BYTE COUNT REGISTER A1
DESCRIPTION
BIT
[7:2]
1
0
Table 45 – RAM Buffer Read Byte Count Register A2 Register
RAMRDBC_A2
(0xD4 - RESET=0x00)
RAM BUFFER READ BYTE COUNT REGISTER A2
NAME
R/W
COUNT[7:0]
R/W
Bits 7 thru 0 the byte count of the packet to be transferred
from the SRAM. The packet is stored beginning at address
0x0100
BIT
[7:0]
DESCRIPTION
Table 46 – RAM Buffer Read Byte Count Register B1
RAMRDBC_B1
(0xD5 - RESET=0x00)
NAME
R/W
Reserved
R
This bit always reads “0”.
512Bytes
R/W
1 = Indicates that 512 bytes are to transferred
COUNT8
R/W
Bit 8 of the byte count for the data to be transferred.
RAM BUFFER READ BYTE COUNT REGISTER B1
DESCRIPTION
BIT
[7:2]
1
0
Table 47 – RAM Buffer Read Byte Count Register B2 Register
RAMRDBC_B2
(0xD6 - RESET=0x00)
RAM BUFFER READ BYTE COUNT REGISTER B2
NAME
R/W
COUNT[7:0]
R/W
Bits 7 thru 0 the byte count of the packet to be transferred
from the SRAM. The packet is stored beginning at address
0x0300.
BIT
[7:0]
DESCRIPTION
Table 48 – NAK Register (INT5)
NAK
(0xD7 - RESET=0x00)
NAME
NYET2RX
NAK REGISTER
DESCRIPTION
BIT
7
R/W
R
1 = indicates that an NYET has been sent to the host on
Endpoint 2 in response to an OUT token.
1 = indicates that an NYET has been sent to the host on
Endpoint 0 in response to an OUT token.
1 = indicates that an NAK has been sent to the host on
Endpoint 2 in response to an IN token.
6
NYET0RX
R
5
NAK2TX
R
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