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參數(shù)資料
| 型號(hào)： | UZNBG2000X10 |
| 廠商： | ZETEX PLC |
| 元件分類： | 模擬信號(hào)調(diào)理 |
| 英文描述： | SPECIALTY ANALOG CIRCUIT, PDSO10 |
| 封裝： | MSOP-10 |
| 文件頁數(shù)： | 4/7頁 |
| 文件大?。?/td> | 514K |
| 代理商： | UZNBG2000X10 |
FUNCTIONAL
DESCRIPTION
The ZNBG devices provide all the bias requirements
for external FETs, including the generation of the
negative supply required for gate biasing, from the
single supply voltage.
The diagram above shows a single stage from the
ZNBG series. The ZNBG2000/1 contains 2 such
stages.
The drain voltage of the external FET QN is set by the
ZNBG device to its normal operating voltage. This is
determined by the on board VD Set reference, for the
ZNBG2000 this is nominally 2.2 volts whilst the
ZNBG2001 provides nominally 2 volts.
The drain current taken by the FET is monitored by
the low value resistor ID Sense. The amplifier driving
the gate of the FET adjusts the gate voltage of QN so
that the drain current taken matches the current
called for by an external resistor RCAL. Both ZNBG
devices have the facility to program different drain
currents into selected FETs.
Since the FET is a depletion mode transistor, it is
usually necessary to drive its gate negative with
respect to ground to obtain the required drain
current. To provide this capability powered from a
single positive supply, the device includes a low
current negative supply generator. This generator
uses an internal oscillator and two external
capacitors, CNB and CSUB.
ISSUE 1 - AUGUST 2001
4
ZNBG2000
ZNBG2001
FUNCTIONAL DIAGRAM
7
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