參數(shù)資料
型號: V1724EBBA
英文描述: SOP DUAL PORT
中文描述: 光放大器平臺,1724 -型Eribium鉺光纖放大器(S和V系列)
文件頁數(shù): 3/12頁
文件大?。?/td> 168K
代理商: V1724EBBA
Agere Systems Inc.
3
Data Sheet
July 1999
Erbium-Doped Fiber Amplifier (S and V Series)
Optical Amplifier Platform, 1724-Type
Block Diagram
Figure 1. 1724-Type EDFA Block Diagram
Pin Information
1. Do not connect to reserved pins.
2. Normal = TTL low, alarm = TTL high if the output power falls 2 dB below the minimum value.
3. Normal = TTL low, alarm = TTL high if pump bias exceeds 95% of its end-of-life value.
4. Normal = TTL low, alarm = TTL high if pump temperature exceeds 35 °C.
5. The EDFA is equipped with an optical transient suppression feature when this pin is tied to GND. The EDFA will turn all pumps off, if the
input power is too low. Tying this pin to 5 V will disable this feature; however, damage to the optical connectors and components may occur
if the amplifier is turned on without the presence of an optical signal.
6. Normal = TTL low, alarm = TTL high if input power is less than 2 dB below minimum P
IN
.
7. Amplifier enable (all pumps are on) = TTL low, amplifier disable (all pumps are off) = TTL high.
Table 1. Pin Descriptions for a Microcontrolled (Full) Amplifier
Pin
Description
Pin
Description
1
2
3
4
5
6
7
8
9
5.0 V (±0.25 V)
5.0 V (±0.25 V)
5.0 V (±0.25 V)
5.0 V (±0.25 V)
Reserved
1
Reserved
1
EDFA Temperature Alarm
Loss of Output Power Alarm
2
Pumps Bias Alarm
3
Pumps Temperature Alarm
4
EDFA Shutdown Override
5
5.0 V (±0.25 V)
GND
14
15
16
17
18
19
20
21
22
23
24
25
GND
GND
GND
GND
RS-232 OUT (TTL)
Loss of Input Power Alarm
6
Reserved
1
Amplifier Disable Input
7
RS-232 IN (TTL)
Reserved
1
5.0 V (±0.25 V)
GND
10
11
12
13
INPUT TAP
OPTICAL GAIN
OUTPUT TAP
PD #2
OUTPUT POWER
MONITOR
MICROCONTROLLER
PD #1
INPUT POWER
MONITOR
OPTICAL
INPUT
SIGNAL
OPTICAL
OUTPUT
SIGNAL
1-904 (C)
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