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參數(shù)資料
| 型號(hào)： | V23833-FX105-B001 |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 英文描述： | XFP1310 nm Small Form Factor Module 10 Gigabit Pluggable Transceiver Compatible with XFP MSA Rev. 3.1 |
| 中文描述： | XFP1310納米纖巧萬(wàn)兆模塊可插拔收發(fā)器帶有XFP海事牧師3.1兼容 |
| 文件頁(yè)數(shù)： | 5/25頁(yè) |
| 文件大?。?/td> | 718K |
| 代理商： | V23833-FX105-B001 |
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V23833-Fx105-B001
V23833-Fx105-B002
Pin Configuration
Preliminary Product Information
5
2004-06-04
Pin Description
Signal Name
Management and Monitoring Ports
MOD_DESEL
LVTTL
Level
I/O
Pin No.
Description
I
3
Module De-select: when “L” allows
the module to respond to 2-wire
serial interface command. “H” active
Interrupt: indicates presence of an
important condition which can be
read on the 2-wire serial interface.
“H” active
Transmitter Disable: transmitter
laser source is turned off. “H” active
2-wire Interface Clock
2-wire Interface Data
Module Absent: indicating the
modules not present. “H” active
Module not ready: module
operational fault
Receiver Loss Of Signal Indicator
Power Saving Mode: places the
module in the stand-by condition.
Active “H”. During the falling edge
set the module reset
INTERRUPT
LVTTL
O
4
TX_DIS
LVTTL
I
5
SCL
SDA
MOD_ABS
LVTTL
LVTTL
LVTTL
I
I
O
10
11
12
MOD_NR
LVTTL
O
13
RX_LOS
P_DOWN
LVTTL
LVTTL
O
I
14
21
Transmit Functions
TD–
TD+
Receive Functions
RD–
RD+
REFCLK+
REFCLK–
DC Power
GND
CML
CML
I
I
28
29
Transmitter Inverted Data Input
Transmitter Not-inverted Data Input
CML
CML
PECL
PECL
O
O
I
I
17
18
24
25
Receiver Data Output Inverted
Receiver Data Output Not-inverted
Reference Clock Not-inverted Input
Reference Clock Inverted Input
0 V
–
1,7,15,16,19,
23,26,27,30
6
8,9
20,22
Ground connection for both signal
and chassis on the module
Positive power supply, nominal
Positive power supply, nominal
Positive power supply, nominal
V
CC5
V
CC3
V
CC2
+5 V
+3.3 V
+1.8 V
I
I
I
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