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參數(shù)資料
| 型號(hào)： | V30208S |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Ultra Low Power 1-Bit 32 kHz RTC |
| 中文描述： | 超低功耗1位32 kHz的時(shí)鐘 |
| 文件頁(yè)數(shù)： | 6/14頁(yè) |
| 文件大?。?/td> | 470K |
| 代理商： | V30208S |
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6
Timing Characteristics
V = 0 V, and T = - 40 to + 85 C, unless otherwise specified
O
1)
t
Typically, t
2)
CS, RD, DS, WR and R/W rise and fall times are specified by t and t
3)
t starts from RD or CS, whichever deactivates first
4)
t
ends at WR or CS, whichever deactivates first
DW
5)
t
starts from WR or CS, whichever deactivates first
DH
6)
t
starts from WR or CS, whichever activates last and ends at WR or CS, whichever deactivates first
WC
starts from RD or CS, whichever activates last
= 5 + 0.9 C
ACC
ACC
in ns; where C
(external parasitic capacitance) is in pF
EXT
EXT
F
t
CS
t
ACC
t
W
t
R
t
F
t
DF
t
DW
t
DH
t
ADW
t
WC
500
500
10
10
15
80
120
20
500
Table 4
50
100
10
10
15
50
25
10
50
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
60
200
200
40
50
30
300
200
200
200
Write cycle
C
LOAD
= 50pF
Chip select duration
RAM access time
Time between two transfers
2)
Rise time
2)
Fall time
Data valid to Hi-impedance
Write data settle time
Data hold time
Advance write time
Write pulse time
3)
Parameter
Symbol
Test Conditions
Min.
Min.
Typ.
Max.
Max.
Unit
V
3
2 V
DD
V = 5.0 V ± 10%
Timing Waveforms
Read Timing for Intel (RD and WR Pulse) and Motorola (DS (or RD pin tied to CS) and R/W)
Fig. 7a
CS
t
CS
t
ACC
t
DF
t
W
t
R
t
F
RD / DS
WR / R/W
I/O
data valid
Write Timing for Intel (
and WR Pulse)
RD
Fig. 7b
CS
t
CS
t
W
t
WC
t
DW
t
DH
RD
WR
I/O
data valid
V3020
R
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| V30208TSS | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Ultra Low Power 1-Bit 32 kHz RTC |
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| V3020SO8B | 制造商:EMMICRO 制造商全稱:EM Microelectronic - MARIN SA 功能描述:Ultra Low Power 1-Bit 32 kHz RTC |
| V3020TP8A | 制造商:EMMICRO 制造商全稱:EM Microelectronic - MARIN SA 功能描述:Ultra Low Power 1-Bit 32 kHz RTC |
| V3020TP8B | 制造商:EMMICRO 制造商全稱:EM Microelectronic - MARIN SA 功能描述:Ultra Low Power 1-Bit 32 kHz RTC |
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