參數(shù)資料
型號(hào): V436516R04VXTG-10PCL
廠商: Mosel Vitelic, Corp.
英文描述: 3.3 VOLT 16M x 64 LOW PROFILE UNBUFFERED SDRAM MODULE
中文描述: 3.3伏16米x 64低收縮無(wú)緩沖內(nèi)存模塊
文件頁(yè)數(shù): 5/12頁(yè)
文件大?。?/td> 381K
代理商: V436516R04VXTG-10PCL
MOSEL VITELIC
V436516R04V(L)
5
V436516R04V(L) Rev.1.0 October 2001
DC Characteristics
T
A
= 0
°
C to 70
°
C; V
SS
= 0 V; V
DD
, V
DDQ
= 3.3V
±
0.3V
28
Minimum Row Active to Row Active Delay
t
RRD
14 ns/15 ns/16 ns
0E
0F
10
29
Minimum RAS to CAS Delay t
RCD
15 ns/20 ns
0F
14
14
30
Minimum RAS Pulse Width t
RAS
42 ns/45 ns
2A
2D
2D
31
Module Bank Density (Per Bank)
64 MByte
10
10
10
32
SDRAM Input Setup Time
1.5 ns/2.0 ns
15
15
20
33
SDRAM Input Hold Time
0.8 ns/1.0 ns
08
08
10
34
SDRAM Data Input Setup Time
1.5 ns/2.0 ns
15
15
20
35
SDRAM Data Input Hold Time
0.8 ns/1.0 ns
08
08
10
62-61
Superset Information (May be used in Future)
00
00
00
62
SPD Revision
Revision 2/1.2
02
02
12
63
Checksum for Bytes 0 - 62
D2
17
85
64
Manufacturer’s JEDEC ID Code
Mosel Vitelic
40
40
40
65-71
Manufacturer’s JEDEC ID Code (cont.)
00
00
00
72
Manufacturing Location
73-90
Module Part Number (ASCII)
V436516R04V(L)
91-92
PCB Identification Code
93
Assembly Manufacturing Date (Year)
94
Assembly Manufacturing Date (Week)
95-98
Assembly Serial Number
99-125
Reserved
00
00
00
126
Intel Specification for Frequency
64
64
64
127
Supported frequency
128+
Unused Storage Location
00
00
00
Symbol
Parameter
Limit Values
Unit
Min.
Max.
V
IH
Input High Voltage
2.0
V
CC
+0.3
V
V
IL
Input Low Voltage
–0.5
0.8
V
V
OH
Output High Voltage (I
OUT
= –2.0 mA)
2.4
V
V
OL
Output Low Voltage (I
OUT
= 2.0 mA)
0.4
V
SPD (Continued)Table
Byte Num-
ber
Function Described
SPD Entry Value
Hex Value
-75PC
-75
-10PC
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