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參數(shù)資料
| 型號(hào)： | V436516R04VXTG-75PCL |
| 廠商： | Mosel Vitelic, Corp. |
| 英文描述： | 3.3 VOLT 16M x 64 LOW PROFILE UNBUFFERED SDRAM MODULE |
| 中文描述： | 3.3伏16米x 64低收縮無(wú)緩沖內(nèi)存模塊 |
| 文件頁(yè)數(shù)： | 9/12頁(yè) |
| 文件大?。?/td> | 381K |
| 代理商： | V436516R04VXTG-75PCL |
MOSEL VITELIC
V436516R04V(L)
9
V436516R04V(L) Rev.1.0 October 2001
Notes:
1.
The specified values are valid when addresses are changed no more than once during t
CK
(min.) and when No
Operation commands are registered on every rising clock edge during t
RC
(min). Values are shown per module
bank.
2.
The specified values are valid when data inputs (DQ’s) are stable during t
RC
(min.).
3.
All AC characteristics are shown for device level.
An initial pause of 100
μ
s is required after power-up, then a Precharge All Banks command must be given followed
by 8 Auto Refresh (CBR) cycles before the Mode Register Set Operation can begin.
4.
AC timing tests have V
IL
= 0.4V and V
IH
= 2.4V with the timing referenced to the 1.4V crossover point. The transition
time is measured between V
IH
and V
IL
. All AC measurements assume t
T
= 1 ns with the AC output load circuit
shown. Specific tac and toh parameters are measured with a 50 pF only, without any resistive termination and with
a input signal of 1V / ns edge rate between 0.8V and 2.0V.
5.
If clock rising time is longer than 1 ns, a time (t
T
/2 -0.5) ns has to be added to this parameter.
6.
Rated at 1.5V
7.
If t
T
is longer than 1 ns, a time (t
T
-1) ns has to be added to this parameter.
8.
Any time that the refresh Period has been exceeded, a minimum of two Auto (CBR) Refresh commands must be
given to “wake-up” the device.
9.
Self Refresh Exit is a synchronous operation and begins on the 2nd positive clock edge after CKE returns high.
Self Refresh Exit is not complete until a time period equal to t
RC
is satisfied once the Self Refresh Exit command
is registered.
10.
Referenced to the time which the output achieves the open circuit condition, not to output voltage levels.
11.
t
DAL
is equivalent to t
DPL
+ t
RP
.
1.4V
1.4V
tSETUP
tHOLD
tAC
tAC
tLZ
tOH
tHZ
CLOCK
INPUT
OUTPUT
50 pF
I/O
Z=50 Ohm
+ 1.4 V
50 Ohm
2.4V
0.4V
t
T
tCL
tCH
I/O
Measurement conditions for
tac and toh
50 pF
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| V436516R04VATG-75 | ER 7C 7#16 PIN RECP BOX |
| V436516R04VXTG-10PCL | 3.3 VOLT 16M x 64 LOW PROFILE UNBUFFERED SDRAM MODULE |
| V436516S04VATG-75PC | 3.3 VOLT 16M x 64 HIGH PERFORMANCE PC133 UNBUFFERED SDRAM MODULE |
| V436516S04VATG-75 | ER 7C 7#16 PIN RECP BOX |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| V436516S04VATG-75 | 制造商:MOSEL 制造商全稱:MOSEL 功能描述:3.3 VOLT 16M x 64 HIGH PERFORMANCE PC133 UNBUFFERED SDRAM MODULE |
| V436516S04VATG-75PC | 制造商:MOSEL 制造商全稱:MOSEL 功能描述:3.3 VOLT 16M x 64 HIGH PERFORMANCE PC133 UNBUFFERED SDRAM MODULE |
| V436516S04VTG-10PC | 制造商:MOSEL 制造商全稱:MOSEL 功能描述:3.3 VOLT 16M x 64 HIGH PERFORMANCE PC100 UNBUFFERED SDRAM MODULE |
| V436516Y04V | 制造商:MOSEL 制造商全稱:MOSEL 功能描述:128MB 144-PIN UNBUFFERED SDRAM SODIMM, 16MX64 3.3VOLT |
| V436516Y04VATG-10PC | 制造商:MOSEL 制造商全稱:MOSEL 功能描述:128MB 144-PIN UNBUFFERED SDRAM SODIMM, 16MX64 3.3VOLT |
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