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參數(shù)資料
| 型號： | V6108 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 40 Segment Static LCD Driver |
| 中文描述： | 靜態(tài)40段LCD驅(qū)動器 |
| 文件頁數(shù)： | 2/8頁 |
| 文件大?。?/td> | 331K |
| 代理商： | V6108 |
2
Stresses above these listed maximum ratings may cause
permanent damage to the device. Exposure beyond specified
operating conditions may affect device reliability or cause
malfunction.
Electrical Characteristics
Handling Procedures
This device has built-in protection against high static voltages
or electric fields;however, anti-static precautionsmust be taken
asforanyotherCMOScomponent.Unlessotherwisespecified,
proper operation can only occur when all terminal voltages are
kept within the supply voltage range. Unused inputs must
alwaysbetiedtoadefinedlogicvoltagelevel.
Operating Conditions
Parameter
SymbolMin. Typ. Max. Units
Operating temperature
Logic supply voltage
LCD supply voltage
Absolute Maximum Ratings
Table 1
V
DD
V
LCD
V
LOGIC
V
DISP
T
STO
P
MAX
V
T
Smax
S
-0.3V to +10V
-0.3V to +14V
-0.3V to V
+0.3V
DD
V
- 65 to +150 C
100 mW
to V
+ 0.3V
1000V
250 C x 10 s
o
1)
V
has to be higher or equal to V
LCD
DD
Table 2
T
A
V
DD
-40
2.0
V
DD
+125
8
12
O
C
V
V
1)
1)
The maximum operating temperature is confirmed
by sampling at initial device qualification. In
production, all devices are tested at +85 C.
requestdevicestestedat+125 C canbesupplied.
On
1)
2)
3)
Tested with V = V , V = V
Tested with f
Tested with f
FL
Timing Characteristics
V
= 5V ± 10%, V
DD
Table 3
= 100 kHz, F = 50 kHz, 50 pF on each segment
= 64 Hz, f = 0 Hz, 50 pF on each segment
CL
= 12 V and T = -40 to +85 C, unless otherwise specified
LCD
1)
2)
Recommended frame frequency.
Maximum test frequency.
Parameter
Clock high pulse width
Clock low pulse width
Clock and FR rise time
Clock and FR fall time
Data input setup time
Data input hold time
Data output propagation
CLK falling to STR rising
STR falling to CLK falling
STR pulse width
Symbol
t
CH
t
CL
t
CR
t
CF
t
DS
t
DH
t
PD
t
P
t
D
t
STR
Test Conditions
Min.
500
500
Typ.
Max.
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
FR frequency
Delay S1 - S40 fall time
Delay S1 - S40 rise time
f
FR
t
SF
t
SR
C
= 50 pF
LOAD
250
0
50
250
200
800
ns
MHz
μ
s
Table 4
500
500
μ
s
600
64 Hz
0.5
2.9
1)
1
2)
1
5
I
DD
I
LCD
I
DD
I
LCD
I
IL
V
IL
V
IH
V
SH
V
SL
I
SC
See note
See note
See note
See note
1)
1)
1)2)
1)3)
V =V
V =V
SS
DD
or
I = 100 A V
I = 100 A V
= V
= V
= 4.5 V
= 4.5 V
DD
LCD
μ
μ
3.8
V
- 100
DD
0.1
0.1
55
0.6
3.5
1
1
75
5
1
0.8
μ
A
μ
A
μ
A
μ
A
μ
A
V
V
mV
mV
DD
LCD
V
+ 100
SS
I = 20 A, V
I = 20 A, V
= V
= V
= 4.5 V
= 4.5 V
DD
LCD
μ
μ
DD
LCD
mV
mV
mA
V
+ 100
SS
V
- 100
LCD
V
OL
V
OH
V6108
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