參數(shù)資料
型號(hào)： V62C2801024LL-70T
廠商： Mosel Vitelic, Corp.
英文描述： Ultra Low Power 128K x 8 CMOS SRAM
中文描述： 128K的超低功耗× 8 CMOS SRAM的
文件頁(yè)數(shù)： 1/10頁(yè)
文件大?。?/td> 92K
代理商： V62C2801024LL-70T
1
2
3
4
5
6
7
8
9
10
16
15
14
13
12
11
A
8
A
13
WE
CE
2
A
15
Vcc
NC
A
16
A
14
A
12
A
7
A
6
A
5
A
4
A
9
A
11
32
31
30
29
28
27
26
25
24
23
17
18
19
20
21
22
CE1
I/O
8
I/O
7
I/O
6
I/O
5
I/O
4
GND
I/O
3
I/O
2
I/O
1
A
0
A
1
A
2
A
3
A
10
OE
1024
R
S
INPUT BUFFER
COLUMN DECODER
A
11
A
12
CONTROL
CIRCUIT
7
I/O
0
WE
CE1
CE2
A
9
A
10
A
11
A
12
A
13
A
14
A
15
A
16
A
8
A
7
A
9
A
6
A
8
A
5
A
7
A
4
A
6
A
3
A
5
A
2
A
3
A
1
A
2
A
0
A
1
V 62C2801024L(L)
Ultra Low Power
128K x 8 CMOS SRAM
Features
Ultra Low-power consumption
- Active: 25mA at 70ns
- Stand-by: 5
μ
A
(CMOS input/output)
1
μ
A
CMOS input/output, L version
Single +2.2V to 2.7V Power Supply
Equal access and cycle time
70/85/100/150 ns access time
Easy memory expansion with CE1, CE2
and OE inputs
1.0V data retention mode
TTL compatible, Tri-state input/output
Automatic power-down when deselected
Functional Description
TheV62C2801024L is a low power CMOS Static RAM org-
anized as 131,072 words by 8 bits. Easy memory expansion is
provided by an active LOW CE1, an active HIGH CE2, an
active LOW OE, and Tri-state I/O’s. This device has an a-
utomatic power-down mode feature when deselected.
Writing to the device is accomplished by taking Chip E-
nable 1 (CE1) with Write Enable (WE) LOW, and Chip En-
able 2 (CE2) HIGH. Reading from the device is performed
by taking Chip Enable 1 (CE1) with Output Enable
(OE) LOW while Write Enable (WE) and Chip Enable 2
(CE2) is HIGH. The I/O pins are placed in a high-imped-
ance state when the device is deselected: the outputs are d-
isabled during a write cycle.
TheV62C2801024LL comes with a 1V data retention feature
and Lower Standby Power. The V62C2801024L is available in
a 32pin 8 x 20 mm TSOP1 / STSOP / 48-fpBGA packages.
32-Pin TSOP1 / STSOP / 48-fpBGA
(See nest page)
Logic Block Diagram
1024
X
1024
R
S
COLUMN DECODER
CONTROL
I/O8
I/O1
OE
WE
CE1
CE2
A
10
A
13
A
14
A
15
A
16
A
4
A
0
REV. 1.
1
April
2001 V62C
2
801024L(L)
1
相關(guān)PDF資料
PDF描述
V62C2801024LL-70V Ultra Low Power 128K x 8 CMOS SRAM
V62C2801024LL-85T Ultra Low Power 128K x 8 CMOS SRAM
V62C2801024L-100V Ultra Low Power 128K x 8 CMOS SRAM
V62C2801024LL-100T Ultra Low Power 128K x 8 CMOS SRAM
V62C2801024LL-100V Ultra Low Power 128K x 8 CMOS SRAM
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
V62C2801024LL-70V 制造商:MOSEL 制造商全稱:MOSEL 功能描述:Ultra Low Power 128K x 8 CMOS SRAM
V62C2801024LL-85T 制造商:MOSEL 制造商全稱:MOSEL 功能描述:Ultra Low Power 128K x 8 CMOS SRAM
V62C2801024LL-85V 制造商:MOSEL 制造商全稱:MOSEL 功能描述:Ultra Low Power 128K x 8 CMOS SRAM
V62C2802048L 制造商:MOSEL 制造商全稱:MOSEL 功能描述:Ultra Low Power 256K x 8 CMOS SRAM
V62C2802048L(L)-100B 制造商:MOSEL 制造商全稱:MOSEL 功能描述:Ultra Low Power 256K x 8 CMOS SRAM
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