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參數(shù)資料
| 型號： | V826632M24SAIW-D3 |
| 廠商： | PROMOS TECHNOLOGIES INC |
| 元件分類： | DRAM |
| 英文描述： | 32M X 64 DDR DRAM MODULE, 0.65 ns, ZMA172 |
| 封裝： | GREEN, MICRO, DIMM-172 |
| 文件頁數(shù)： | 10/14頁 |
| 文件大小： | 161K |
| 代理商： | V826632M24SAIW-D3 |
ProMOS TECHNOLOGIES
V826632M24SA
5
V826632M24SA Rev.1.3 April 2006
Serial Presence Detect Information
Bin Sort:
D0 (PC3200 @ CL 2.5-3-3)
D3 (PC3200 @ CL 3-3-3)
C0 (PC2700 @ CL 2.5-3-3)
B1 (PC2100A @ CL 2-2-2)
B0 (PC2100B @ CL 2.5-3-3)
Byte
#
Function described
Function Supported
Hex value
D0
D3
C0
B1
B0
D0
D3
C0
B1
B0
0
Defines # of Bytes written into serial memory at mod-
ule manufacturer
128bytes
80h
1
Total # of Bytes of SPD memory device
256bytes
08h
2
Fundamental memory type
SDRAM DDR
07h
3
# of row address on this assembly
13
0Dh
4
# of column address on this assembly
10
0Ah
5
# of module Rows on this assembly
1 Bank
01h
6
Data width of this assembly
64 bits
40h
7
.........Data width of this assembly
-
00h
8
VDDQ and interface standard of this assembly
SSTL 2.5V
04h
9
DDR SDRAM cycle time at highest CAS Latency
5ns
6ns
7ns
7.5ns
50h
60h
70h
75h
10
DDR SDRAM Access time from clock at highest CL ±0.65ns ±0.65ns ±0.70ns ±0.75ns ±0.75ns 65h
65h
70h
75h
11
DIMM configuration type(Non-parity, Parity, ECC)
Non-parity, ECC
00h
12
Refresh rate & type
7.8us & Self refresh
82h
13
Primary DDR SDRAM width
x8
08h
14
Error checking DDR SDRAM data width
N/A
00h
15
Minimum clock delay for back-to-back random col-
umn address
tCCD=1CLK
01h
16
DDR SDRAM device attributes : Burst lengths sup-
ported
2,4,8
0Eh
17
DDR SDRAM device attributes : # of banks on each
DDR SDRAM
4 banks
04h
18
DDR SDRAM device attributes : CAS Latency sup-
ported
2,2.5,3
1Ch
0Ch
19
DDR SDRAM device attributes : CS Latency
0CLK
01h
20
DDR SDRAM device attributes : WE Latency
1CLK
02h
21
DDR SDRAM module attributes
Differential clock /
non Registered
20h
22
DDR SDRAM device attributes : General
+/-0.2V voltage tolerance
00h
23
DDR SDRAM cycle time at second highest CL
5.0ns
6.0ns
7.5ns
10ns
50h
60h
75h
A0h
24
DDR SDRAM Access time from clock at second
highest CL
±0.65ns ±0.70ns ±0.70ns ±0.75ns ±0.75ns 65h
70h
75h
25
DDR SDRAM cycle time at third highest CL
7.5ns
-
75h
00h
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| V827464N24SCIX-D3 | 64M X 72 DDR DRAM MODULE, 0.65 ns, DMA184 |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| V826664G24S | 制造商:MOSEL 制造商全稱:MOSEL 功能描述:512 MB 200-PIN DDR UNBUFFERED SODIMM 2.5 VOLT 64M x 64 |
| V826664K24S | 制造商:MOSEL 制造商全稱:MOSEL 功能描述:2.5 VOLT 64M x 64 HIGH PERFORMANCE UNBUFFERED DDR SDRAM MODULE |
| V827316K04S | 制造商:MOSEL 制造商全稱:MOSEL 功能描述:2.5 VOLT 16M x 72 HIGH PERFORMANCE UNBUFFERED ECC DDR SDRAM MODULE |
| V827332K04S | 制造商:MOSEL 制造商全稱:MOSEL 功能描述:2.5 VOLT 32M x 72 HIGH PERFORMANCE UNBUFFERED ECC DDR SDRAM MODULE |
| V827332N04S | 制造商:MOSEL 制造商全稱:MOSEL 功能描述:2.5 VOLT 32M x 72 HIGH PERFORMANCE REGISTERED ECC DDR SDRAM MODULE |
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