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參數(shù)資料
| 型號： | VCC1-B3D-40M000 |
| 廠商： | VECTRON INTERNATIONAL |
| 元件分類： | XO, clock |
| 英文描述： | CRYSTAL OSCILLATOR, CLOCK, 40 MHz, CMOS OUTPUT |
| 封裝： | ROHS COMPLIANT PACKAGE-4 |
| 文件頁數(shù)： | 2/10頁 |
| 文件大?。?/td> | 216K |
| 代理商： | VCC1-B3D-40M000 |
Vectron International 267 Lowell Road, Hudson, NH 03051 Tel: 1-88-VECTRON-1 http://www.vectron.com
Performance Specifications
Table 1. Electrical Performance, 5V Option
Parameter
Symbol
Min
Typical
Maximum
Units
Supply
Voltage
1
Max Voltage
Current
2
≤20.000MHz
20.001 to 50.000MHz
50.001 to 85.000MHz
85.001 to 125.000MHz
Current, Output Disabled
V
DD
4.5
-0.7
5.0
5.5
7
V
V
I
DD
10
30
50
60
30
mA
uA
Frequency
Nominal Frequency
3
Stability
4
,
(Ordering Option)
f
N
1.544
125.000
MHz
ppm
±20, ±25, ±32, ±50, ±100
Outputs
Output Logic Levels
2
Output Logic High
Output Logic Low
Output Logic High Drive
Output Logic Low Drive
Load
Output Rise /Fall Time
2
<20.000MHz
20.000 to 50.000MHz
50.001 to 125.000MHz
Output Leakage, Output Disabled
Duty Cycle
2,5
Period Jitter
6
RMS
Peak-Peak
RMS Jitter, 12k-20MHz
V
OH
V
OL
I
OH
I
OL
I
OUT
t
R
/t
F
0.9*V
DD
16
16
0.1*V
DD
V
V
mA
mA
pF
ns
15
8
5
2
I
Z
±10
55
uA
%
ps
45
50
фJ
2.5
18
0.5
фJ
1
ps
Enable/Disable
Output Enable/Disable
7
Output Enable
Output Disable
Disable time
Enable Internal Pull-Up Resistor
V
IH
V
IL
t
D
4.0
0.8
100
V
V
ns
100
Kohm
Start-Up Time
Operating Temp, (Ordering Option)
t
SU
T
OP
10
ms
°C
-10/70 or -40/85
The power supply should have by-pass capacitors as close to the supply and to ground as possible, for example 0.1 and 0.01uF
Parameters are tested with production test circuit below, Figure 1.
See Standard Frequencies and Ordering Information tables for more specific information
Includes initial accuracy, operating temperature, supply voltage, shock and vibration (not under operation) and 10 years aging.
Duty Cycle is measured as On Time/Period (Fig 2).
Broadband Period Jitter measured using a LeCroy Wavemaster 8600A, 90K samples, see Application Note for Typical Phase Noise and Jitter Performance
The Output is Enabled if the Enable/Disable is left open.
1]
2]
3]
4]
5]
6]
7]
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