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參數(shù)資料
| 型號： | VCFOGE |
| 英文描述： | NOCKANSCHALTER VARIO 20A |
| 中文描述： | NOCKANSCHALTER巴里奧20A條 |
| 文件頁數(shù)： | 13/19頁 |
| 文件大?。?/td> | 215K |
| 代理商： | VCFOGE |
On-line Phase Timing(Acquisition and Elaboration) Working Frequency 40MHz
OFL
I0-I6
DATA0
DATAn
DATA1
MCLK
FIN
NP
EP
FIN detection
DATA0 acquisition
DATA1 acquisition
DATAn acquisition
T
ACQ
T
ACQ =
200 ns for a configuration with 16 inputs, 8 outputs, 28 rules
Timing Table Description:
ON-LINE phase
1
st
step:Acquisition
- MCLK[INPUT] must be connectedwith the externalsynchronization signal.
- OFL[INPUT] must be set low to enable the acquisition/elaborationphase of W.A.R.P..
- FIN [INPUT] must be sethigh for at least 1clock period to start the acquisitionphase. OFLmust already
be low since at least 4 clock periods before providing a FIN pulse. FIN duration must be in the range
[1clock,2clockperiods]. FIN pulse mustn’t coincide with NP transitions.
- NP [OUTPUT] will remain low during the acquisitionphase.
- Theinput data must be sent toI0-I6 after OFL hasbeen set lowandFIN has beensethigh. Datasituated
in I0-I6 arestored into its internalregisters at each next rising edge of the MCLK.
- After the current inputs have been acquired, the NP [OUTPUT] high signal informs that the elaboration
phase can start. Thisinformation is provided thanks to the configurationstored in the programmemory.
Figure 10. Input/Output Connection Block Diagram
13/19
W.A.R.P.1.1
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| VCFQ1 | 制造商:SAIA - BURGESS ELECTRONICS INC. 功能描述:Non Catalogue / VCFQ1 |
| VCFQR1 | 制造商:JOHNSON ELECTRIC 功能描述:SWITCH 制造商:SAIA - BURGESS ELECTRONICS INC. 功能描述:Non Catalogue / VCFQR1 |
| VCFQR2 | 制造商:SAIA - BURGESS ELECTRONICS INC. 功能描述:Non Catalogue / VCFQR2 |
| VCFSA1H183JT | 制造商:Panasonic Industrial Company 功能描述:CAPACITOR |
| VCFT | 制造商:SAIA - BURGESS ELECTRONICS INC. 功能描述:Non Catalogue / VCFT |
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