參數(shù)資料
型號(hào): VG2617400DJ-5
英文描述: DRAM|FAST PAGE|4MX4|CMOS|SOJ|26PIN|PLASTIC
中文描述: 內(nèi)存|快速頁(yè)面| 4MX4 |的CMOS | SOJ | 26PIN |塑料
文件頁(yè)數(shù): 1/25頁(yè)
文件大?。?/td> 212K
代理商: VG2617400DJ-5
Document:1G5-0126
Rev.1
Page 1
VIS
VG26(V)(S)17400D
4,194,304 x 4 - Bit
CMOS Dynamic RAM
Description
The device is CMOS Dynamic RAM organized as 4,194,304 words x 4 bits. It is fabricated with an
advanced submicron CMOS technology and designed to operate from a single 5V only or 3.3V only power
supply. Low voltage operation is more suitable to be used on battery backup, portable electronic application.
A new refresh feature called “ self-refresh “ is supported and very slow CBR cycles are being performed. It is
packaged in JEDEC standard 26/24 - pin plastic SOJ or TSOP (II).
Features
Single 5V (
%) or 3.3V (
%) only power supply
High speed t
RAC
access time : 50/60 ns
Low power dissipation
- Active mode : 5V version 605/550 mW (Max.)
3.3V version 396/360 mW (Max.)
- Standby mode : 5V version 1.375 mW (Max.)
3.3V version 0.54 mW (Max.)
Fast Page Mode access
I/O level : TTL compatible (Vcc = 5V)
LVTTL compatible (Vcc = 3.3V)
2048 refresh cycles in 32 ms (Std) or 128ms (S - version)
4 refresh mode :
- RAS only refresh
- CAS-before-RAS refresh
- Hidden refresh
- Self - refresh (S - version)
10
±
10
±
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相關(guān)代理商/技術(shù)參數(shù)
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