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參數(shù)資料
| 型號(hào)： | VK501A |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 8-BIT UNIVERSAL BUS TRANSCEIVER AND TWO 1-BIT BUS TRANSCEIVERS WITH SPLIT LVTTL PORT, FEEDBACK PATH, AND 3-STATE OUTPUTS |
| 中文描述： | 8位通用總線收發(fā)器和兩個(gè)1位總線收發(fā)器與劈開LVTTL港口，反饋路徑，以及三態(tài)輸出 |
| 文件頁數(shù)： | 13/30頁 |
| 文件大?。?/td> | 568K |
| 代理商： | VK501A |
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SCES620 – DECEMBER 2004
13
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
B PORT
VOH
VOL
th
tsu
From Output
Under Test
CL = 50 pF
(see Note A)
LOAD CIRCUIT
S1
Open
GND
500
500
tPLH
tPHL
Output Control
Output
Waveform 1
S1 at 6 V
(see Note B)
Output
Waveform 2
S1 at GND
(see Note B)
tPZL
tPZH
tPLZ
tPHZ
3 V
0 V
VOH
VOL
0 V
VOL + 0.3 V
VOH 0.3 V
≈
0 V
3 V
0 V
0 V
tw
Input
3 V
3 V
3 V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
Timing
Input
Data
Input
Output
Input
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
A-to-B Skew
Open
6 V
GND
Open
TEST
S1
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR
≈
10 MHz, ZO = 50
, tr
≈
2 ns, tf
≈
2 ns.
D. The outputs are measured one at a time, with one transition per measurement.
6 V
1.5 V
0 V
3 V
VCC/2
VCC/2
VCC/2
VCC/2
1.5 V
1.5 V
1.5 V
1.5 V
1.5 V
1.5 V
1.5 V
1.5 V
Figure 2. Load Circuit and Voltage Waveforms
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