參數(shù)資料
型號: VL-821-JAW-SAAN-65M0000000
廠商: VECTRON INTERNATIONAL
元件分類: XO, clock
英文描述: CRYSTAL OSCILLATOR, CLOCK, 65 MHz, CMOS OUTPUT
封裝: ROHS COMPLIANT, HERMETIC SEALED, CERAMIC PACKAGE-4
文件頁數(shù): 3/7頁
文件大?。?/td> 0K
代理商: VL-821-JAW-SAAN-65M0000000
Vectron International 267 Lowell Road, Hudson, NH 03051 Tel: 1-88-VECTRON-1 http://www.vectron.com
Page3
Performance Specifications
Table 2. Electrical Performance, 2.5V Option
Parameter
Symbol
Min
Typical
Maximum
Units
Supply
Operating Supply Voltage1
V
DD
2.25
2.5
2.75
V
Absolute Maximum Opertaing Voltage
-0.5
5
V
Supply Current, Output Enable
<30 MHz
30.01 to 75 MHz
75.01 to 166 MHz
I
DD
8.0
10.0
15.0
mA
Supply Current, Output Disabled 0.7V
DD
I
DD
30
uA
Frequency
Frequency
f
O
0.8
166.000
MHz
Stability4,
(Ordering Option)
±25, ±50, ±100
ppm
Outputs
Output Logic Levels
Output Logic High2
Output Logic Low2
Output Logic High Drive
Output Logic Low Drive
V
OH
V
OL
I
OH
I
OL
0.9*V
DD
8
0.1*V
DD
V
mA
Output Rise /Fall Time2
t
R
/t
F
5ns
Duty Cycle3
SYM
45
50
55
%
Enable/Disable
Output Enable/Disable5
Output Enable
Output Disable
V
IH
V
IL
0.7*V
DD
0.3*V
DD
V
Internal Enable Internal Pull-Up Resistor
100
Kohm
Start-Up Time
t
SU
10
ms
Operating Temp, (Ordering Option)
T
OP
-10/70 or -40/85
°C
I
DD
V
DD
V
C
I
C
15pF
4
12
3
.1μF
.01μF
+
t
R
t
F
V
OH
V
OL
50%
On Time
Fig 2: Waveform
Fig 1: Test Circuit
A.0.01 uF and a 0.1uF capacitor should be located as close to the supply as possible (to ground) is recommended. V
1]
DD
supply ramp should be
<100
msec.
Figure 2 defines these parameters. Figure 1 illustrates the operating conditions under which these parameters are tested and specified.
2]
Symmetry is measured defined as On Time/Period.
3]
Incudes calibration tolerance, operating temperature, supply voltage variations, aging and shock and vibration (not under operation).
4]
Output will be enabled if enable/disable is left open. E/D should be powered up after V
5]
DD
.
Period
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