參數(shù)資料
型號(hào)： VNC2-32Q1B-TRAY
廠商： FTDI, Future Technology Devices International Ltd
文件頁(yè)數(shù)： 49/88頁(yè)
文件大?。?/td> 0K
描述： IC USB HOST/DEVICE CTRL 32-QFN
應(yīng)用說(shuō)明： Vinculum-II IO Cell Description AppNote
Vinculum-II Debug Interface Description AppNote
Vinculum-II IO Mux Explained AppNote
Vinculum-II PWM Example AppNote
Migrating Vinculum Designs AppNote
標(biāo)準(zhǔn)包裝： 260
系列： Vinculum-II
控制器類型： USB 2.0 控制器
接口： USB，主機(jī)/設(shè)備配置，UART，SPI，PWM，閃存 256K，DMA 4CH
電源電壓： 1.62 V ~ 1.98 V
電流 - 電源： 25mA
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 32-VQFN 裸露焊盤(pán)
供應(yīng)商設(shè)備封裝： 32-QFN 裸露焊盤(pán)（7x7）
包裝： 托盤(pán)
其它名稱： VNC2-32Q1A-TRAY
VNC2-32Q1A-TRAY-ND
53
Copyright 2009-2011 Future Technology Devices International Limited
Datasheet
Vinculum-II Embedded Dual USB Host Controller IC
Version 1.5
Document No.: FT_000138 Clearance No.: FTDI# 143
6.4 Serial Peripheral Interface – SPI Master
VNC2 - SPI Master
External - SPI Slave
CLK
SS#
MISO
MOSI
Figure 6.20 SPI Master block diagram
The SPI Master interface is used to interface to applications such as SD Cards. The SPI Master provides
the following features:
Synchronous serial data link.
Full and half duplex data transmission.
Serial clock with programmable frequency, polarity and phase.
One slave select output.
Programmable delay between negative edge of slave select and start of transfer.
SD Card interface.
An interface thats compatible with the VLSI VS1033 SCI mode used for VMUSIC capability
The SPI Master only clocks in and out data that the VNC2 CPU sets up in its register space. The VNC2
CPU interprets the data words that are to be sent and received.
6.4.1 SPI Master Signal Descriptions.
Table 6.13 shows the SPI master signals and the available pins that they can be mapped to depending
on the package size. Further details on the configuration of input and output signals are available in
Section 5 - I/O Multiplexer.
64 Pin
Package
Available
pins
48 Pin
Package
Available
pins
32 Pin
Package
Available
pins
Name
Type
Description
11, 15,
19, 24,
28, 39,
43, 47,
51, 57,
61
11, 15,
20, 31,
35, 41,
45
11, 23
29
spi_m_clk
Output
SPI master clock input
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