參數(shù)資料
型號: VP-1000A
廠商: Electronic Theatre Controls, Inc.
英文描述: Digital Voice Processor
中文描述: 數(shù)字語音處理器
文件頁數(shù): 3/6頁
文件大?。?/td> 832K
代理商: VP-1000A
VP-1000A..........................................................................................3
VOICE
PIN DESCRIPTIONS
A0 - A14
Output, address bus, expandable by adding a counter.
ANG & ANG
Output, differential analog audio signal.
C1
Input, internal RC oscillator. If external clock is to be used,
it must be connected to this pin and its frequency twice as
fast as the sampling rate.
CLK DRV
Output, a square wave of the same frequency as the
sampling rate when the chip is in the Record or the Play
mode. The frequency will be lower when the chip is in the
Idle mode.
COMPDATA
Input, feedback from the external comparator output.
D0 - D7
Input/output, data bus.
ENV
Input, to be connected to an external integrator output.
INT
Output, connected to an external integrator to produce
envelope waveform.
GND
Ground.
PLAY
Input, active low. When the chip is idle but not under reset,
pulsing this pin will put the chip in the Play mode.
R1
Output, internal RC oscillator. Leave un-connected when
using external clock.
READ
Output, active low. It indicates the chip is in the Play mode.
This signal is usually used to enable memory output.
RECORD
Input, active low. When the chip is idle but not under reset,
pulsing this pin will put the chip in the Record mode.
RESET
Input, active high. Reset the chip back to the Idle mode.
This pin is level sensitive.
R/W
Output, active low. This pin generates a pulse each time
the clock counts to eight. It is usually used as a write strobe
for the SRAM. Active only in the Record mode.
TD, TD
Output, for signal modulation. These pins are useful in the
Record mode only.
VDD
Input, supply voltage.
ADDRESS
GENERATOR
OSC.
&
TIMING CTRL
OUTPUT BUFFER
(TRI-STATE)
8-BIT
SHIFT REGISTER
A0
:
A14
R1
C1
CLK DRV
D0 ..............D7
RECORD PLAY
READ
R/W
ANG
ANG
COMPDATA
RESET
TD
TD
ENV INT
MODULATOR
MODE
CONTROL
VDD
GND
Block Diagram
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