參數(shù)資料
型號: VP7610
廠商: Electronic Theatre Controls, Inc.
英文描述: COLOUR DIGITAL VIDEO CAMERA DECODER IC
中文描述: 彩色數(shù)字攝像機解碼器IC
文件頁數(shù): 12/14頁
文件大?。?/td> 248K
代理商: VP7610
11
VP7610
RCLK to output (CPSEL, SDAO, SDMN)
rising edge of CPCKA or CPCKB to output (YY[7..0], UV[7..0],
CLK1, VSYNC, HSYNC,VACT, HACT, BFLAG)
falling edge of CLK2 to output (YY[7..0], UV[7..0], CLK1, VSYNC,
HSYNC, VACT, HACT, BFLAG)
rising edge of CLK2 to output (YY[7..0], UV[7..0], CLK1,VSYNC,
HSYNC, VACT, HACT, BFLAG)
falling edge of CLK1 to output (YY[7..0], UV[7..0],VSYNC, HSYNC,
VACT, HACT, BFLAG)
rising edge of CLK1 to output
(YY[7..0], UV[7..0], VSYNC, HSYNC, VACT, HACT, BFLAG)
propagation delay from CPCKA or CPCKB to CK2
propagation delay from INVI to INVO
propagation delay from SCLI to SCLOA or SCLOB
-2
(0.4*tCPX)-2
-3
tCPX-3
20
20
5
(0.6*tCPX)+5
3
tCPX+3
10
10
10
ns
ns
ns
ns
ns
ns
ns
ns
ns
fCPX
tCPX
dcCPX
tsuCPDX
thCPDX
fRCK
twRSTN
Description
Name
frequency CPCKA or CPCKB
period CPCKA or CPCKB
duty cycle CPCKA or CPCKB
setup time,
CPDA [3..0] to CPCKA or
CPDB [3..0] to CPCKB
hold time,
CPDA [3..0] to CPCKA or
CPDB [3..0] to CPCKB
frequency RCLK
pulse width of RSTN
Unit
Min.
0
33
40
Max.
30
-
60
MHz
ns
%
ns
ns
MHz
ns
8
4
10
100
40
TIMING REQUIREMENTS
Value
tcqRCLK
tcpCPX
tcqCK2f
tcqCK2r
tcpCK1f
tcqCK1r
tpdCK2
tpdINV
tpdSCL
Description
Name
Unit
Min.
TIMING CHARACTERISTICS
Value
Max.
相關(guān)PDF資料
PDF描述
VP7610CGFPIR COLOUR DIGITAL VIDEO CAMERA DECODER IC
VP7615CGFP1N Video Camera Circuit
VP7615 Colour Digital Video Camera Decoder IC
VP87A8BCGDPAS TV/Video Signal Processor
VP87A8BCGMPES TV/Video Signal Processor
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
VP7610CGFPIR 制造商:未知廠家 制造商全稱:未知廠家 功能描述:COLOUR DIGITAL VIDEO CAMERA DECODER IC
VP7615 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Colour Digital Video Camera Decoder IC
VP7615CGFP1N 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Colour Digital Video Camera Decoder IC
VP-7710V-36001 制造商:Via Technologies, Inc 功能描述:- Bulk
VP-7710V-36121 制造商:VIA Technologies Inc 功能描述:- Bulk