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參數(shù)資料
| 型號： | VRE3021LD |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Analog IC |
| 中文描述： | 模擬IC |
| 文件頁數(shù)： | 5/8頁 |
| 文件大小： | 188K |
| 代理商： | VRE3021LD |
VRE3021DS REV. D JULY 2000
THEORY OF OPERATION
The following discussion refers to the schematic in
figure 2 below. A FET current source is used to bias a
6.3V zener diode. The zener voltage is divided by the
resistor network R1 and R2. This voltage is then applied
to the noninverting input of the operational amplifier which
amplifies the voltage to produce a 2.048V output. The
gain is determined by the resistor networks R3 and R4:
G=1 + R4/R3. The 6.3V zener diode is used because it is
the most stable diode over time and temperature.
The current source provides a closely regulated zener
current, which determines the slope of the references’
voltage vs. temperature function. By trimming the zener
current a lower drift over temperature can be achieved.
But since the voltage vs. temperature function is nonlinear
this compensation technique is not well suited for wide
temperature ranges.
Thaler Corporation has developed a nonlinear
compensation network of thermistors and resistors that is
used in the VRE series voltage references. This
proprietary network eliminates most of the nonlinearity in
the voltage vs. temperature function. By adjusting the
slope, Thaler Corporation produces a very stable voltage
over wide temperature ranges.
This network is less than 2% of the overall network
resistance so it has a negligible effect on long term
stability. Figure 3 shows the proper connection of the
VRE3021 series voltage references with the optional trim
resistor for initial error and the optional capacitor for noise
reduction.
BASIC CIRCUIT CONNECTION
Figure 3 shows the proper connection of the VRE3025
voltage reference with the optional trim resistor for initial
error and optional capacitor for noise reduction.
To achieve the specified performance, pay careful
attention to the layout. A low resistance star configuration
will reduce voltage errors, noise pickup, and noise
coupled from the power supply. Commons should be
connected to a single point to minimize interconnect
resistances.
Figure 3 External Connections
6
Figure 2 Functional Block Diagram
8
5
2
4
R1
R2
R3
R4
+
-
Noise Reduction
NR
8
Voltage reference output
OUT
6
External trim input. Leave open if
not used.
TRIM
5
Ground
GND
4
Positive power supply input
Internally connected. Do not use
Vin
N.C.
2
1,3,7
PIN DESCRIPTION
8
6
5
+ V
OUT
2
+ V
IN
4
VRE3021
10k
C
N
1μF
Optional Noise
Reduction
Capacitor
Optional Fine
Trim Adjustment
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| VRE3021LS | Analog IC |
| VRE3025AD | Analog IC |
| VRE3025BS | Analog IC |
| VRE3025CD | Analog IC |
| VRE3025CS | Analog IC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| VRE3021LS | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog IC |
| VRE3025 | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:Precision Voltage Reference |
| VRE3025-8JS | 制造商:Apex Microtechnology Inc 功能描述:IC VREF SERIES PREC 2.5V 8SMD |
| VRE3025A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Low Cost Precision Reference |
| VRE3025AD | 功能描述:基準電壓& 基準電流 Ref. +2.5V, 0/70C 0.6ppm RoHS:否 制造商:STMicroelectronics 產(chǎn)品:Voltage References 拓撲結(jié)構(gòu):Shunt References 參考類型:Programmable 輸出電壓:1.24 V to 18 V 初始準確度:0.25 % 平均溫度系數(shù)（典型值）:100 PPM / C 串聯(lián) VREF - 輸入電壓（最大值）: 串聯(lián) VREF - 輸入電壓（最小值）: 分流電流（最大值）:60 mA 最大工作溫度:+ 125 C 封裝 / 箱體:SOT-23-3L 封裝:Reel |
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