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參數(shù)資料
| 型號： | VRE4110K |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Low Cost, SOIC-8 Precision References |
| 中文描述： | 低成本，采用SOIC - 8精密參考 |
| 文件頁數(shù)： | 6/7頁 |
| 文件大?。?/td> | 232K |
| 代理商： | VRE4110K |
VRE4100DS REV. A MAY 01
OPERATIONAL NOTES
Input Capacitor
An input capacitor is recommended on the VRE4100
device. A supply bypass capacitor on the input will
assure that the reference is working from a low
impedance source which will improve stability. It
can improve the transient response when the load
current is suddenly increased.
Output Capacitor
The VRE4100 requires a 1μF output capacitor for
loop stabilization (compensation) as well as
transient response. When the load current changes,
the output capacitor must source or sink current
during the time it takes the control loop of the
VRE4100 to respond.
The output capacitor must meet the requirements of
minimum
capacitance
resistance (ESR) range. See Capacitor Selection
below.
and
equivalent
series
Capacitor Selection
A minimum value of 0.2μF over the operating
temperature range is recommended. For a 0.22μF
capacitor the ESR range for 0
°
C -70
°
C is 0.9 to 6.0,
1.0μF is 0.8 to 6.0, and 10μF is 0.4 to 7.0.
Surface mount tantalum capacitors offer small size
for the value and ESR in the range required for the
VRE4100. The optimum performance for the output
capacitor is achieved with a 1.0μF value.
Aluminum electrolytic capacitors have a relatively
large size for the value. They meet the ESR
requirements at 1.0μF as long as the temperature is
above 0
°
C. Below 0
°
C, the ESR increases and it
may exceed the limits indicated in the figures.
Multilayer ceramic capacitors have a small size for
the value, are available in surface mount, and have
excellent RF characteristics. They may not meet the
minimum ESR requirements and have a large
change in value with temperature.
Reverse Current Path
The P-channel pass transistor used in the VRE4100
has an inherent diode connected between the V
in
and V
OUT
pins. Forcing the output to voltages higher
than the input or pulling V
in
below the voltage stored
in the output capacitor by more than the V
be
will
forward bias this diode and current will flow from the
V
out
pin toV
in
. This will not damage the VRE4100 as
long as the current does not exceed 50mA.
ON/OFF Operation
The VRE4100 features a sleep mode that is
activated by pulling the enable pin low. To turn the
reference on, the enable pin is pulled high. If this
feature is not used, the the enable pin should be tied
to V
in
to keep the reference on at all times. The
enable pin must not be left unconnected (floating).
When powered off, the VRE4100 will quickly reduce
both V
out
and I
Q
to zero. During power down, the
charge across the output capacitor is discharged to
ground through the internal circuitry. On power up,
the V
out
is restored in less than 200μs.
The signal source used to drive the enable pin can
come from either a totem-pole output or an open
collector output with a pull-up resistor to the
VRE4100 input voltage. The signal source must be
able to swing above and below the voltage
thresholds to guarantee an ON or OFF state. It
must not exceed the absolute maximum rating for
the enable pin.
Output Accuracy
The output accuracy after assembly at room
temperature is made up of three components: initial
accuracy of the device, thermal hysterisis, and
mechanical stress. The initial accuracy is measured
at the factory and may not reflect the actual output
voltage when the devices are mounted to a PCB.
The effects of mechanical stress and thermal
hysterisis can shift the output voltage.
Thermal Hysterisis
Thermal hysterisis is a change in output voltage
as a result of a temperature change. When
references experience a temperature change and
return to the initial temperature, they do not always
have the same initial voltage. Thermal hysterisis is
difficult to correct and is a major error source in
systems that experience temperature changes
greater than 25°C. Reference vendors are starting
to include this important specification in their
datasheets
Mechanical Hysterisis
Recommendations to minimize mechanical stress:
1) Mount the VRE4100 near the edges or corners of
the PCB. The center of the board generally has the
highest mechanical and thermal stress.
2) Mechanically isolate the device by cutting a U
shaped slot around the VRE4100. This provides
some mechanical and thermal isolation from the rest
of the circuit.
www.thaler.com
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| VRE4112 | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:Precision Voltage Reference |
| VRE4112B | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Low Cost, SOIC-8 Precision References |
| VRE4112C | 功能描述:基準電壓& 基準電流 Ref. +1.25V, 0/70C 2ppm RoHS:否 制造商:STMicroelectronics 產(chǎn)品:Voltage References 拓撲結(jié)構(gòu):Shunt References 參考類型:Programmable 輸出電壓:1.24 V to 18 V 初始準確度:0.25 % 平均溫度系數(shù)（典型值）:100 PPM / C 串聯(lián) VREF - 輸入電壓（最大值）: 串聯(lián) VREF - 輸入電壓（最小值）: 分流電流（最大值）:60 mA 最大工作溫度:+ 125 C 封裝 / 箱體:SOT-23-3L 封裝:Reel |
| VRE4112K | 功能描述:基準電壓& 基準電流 Ref. +1.25V, -40/85C 3ppm RoHS:否 制造商:STMicroelectronics 產(chǎn)品:Voltage References 拓撲結(jié)構(gòu):Shunt References 參考類型:Programmable 輸出電壓:1.24 V to 18 V 初始準確度:0.25 % 平均溫度系數(shù)（典型值）:100 PPM / C 串聯(lián) VREF - 輸入電壓（最大值）: 串聯(lián) VREF - 輸入電壓（最小值）: 分流電流（最大值）:60 mA 最大工作溫度:+ 125 C 封裝 / 箱體:SOT-23-3L 封裝:Reel |
| VRE4120B | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Low Cost, SOIC-8 Precision References |
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