參數(shù)資料
型號： VSC6250
廠商： VITESSE SEMICONDUCTOR CORP
元件分類： 標準邏輯
英文描述： 1Gb/s 16-Channel Drive-Side Deskew IC
中文描述： SPECIALTY LOGIC CIRCUIT, PQFP128
封裝： PLASTIC, QFP-128
文件頁數(shù)： 7/18頁
文件大?。?/td> 240K
代理商： VSC6250
G52197-0, Rev. 4.0
8/19/00
VITESSE
SEMICONDUCTOR CORPORATION
741 Calle Plano, Camarillo, CA 93012 805/388-3700 FAX: 805/987-5896
Page 7
VITESSE
Data Sheet
VSC6250
1Gb/s 16-Channel
Drive-Side Deskew IC
AC Timing Characteristics
Table 2: AC Timing Characteristics
NOTE: (1) Change in range of maximum delay.
.
Figure 7: AC Timing Diagram
Parameter
Description
Min
Typ
Max
Units
t
PDR(MIN),
t
PDF(MIN)
t
PDR(MAX),
t
PDF(MAX)
t
PD(SPAN)
t
RES
DNL
t
PWI
t
PWO
FRCK
DTDD
DTDT
PSRR
t
R
/t
F
t
REFIRE
J
O
Propagation Delay, Minimum Delay
Propagation Delay, Maximum Delay
Propagation Delay, Span
Delay Element Resolution
Delay Differential Nonlinearity
Input Pulse Width
Output Pulse Width
Reference Clock Frequency
Variation in Delay vs. Duty Cycle
Variation in Delay vs Temperature
Power Supply Rejection Ratio
(1)
Output Rise Fall Times (20% to 80%)
Adjacent Edge Spacing
Output Jitter
4.1
9.9
5.8
—
-2
0.75
0.5
5
6.5
13.5
7
20
+2
—
—
—
+50
—
230
—
—
—
ns
ns
ns
ps
11.6
—
8
—
—
—
250
—
2
—
300
—
3
LSB
ns
ns
MHz
ps
ps/C°
ps/100mV
ps
ns
ps rms
-50
—
—
—
2
—
t
PDR(MIN)
t
PDR(MAX)
DINx
DOUTx
t
PDF(MIN)
t
PWO
t
PDF(MAX)
t
PDR(SPAN)
t
PDF(SPAN)
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