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參數(shù)資料
| 型號(hào)： | VSC7146 |
| 廠(chǎng)商： | Vitesse Semiconductor Corporation. |
| 英文描述： | BOX 4.94X2.75X1.275 W/CLP ALMOND |
| 中文描述： | 2.5GB的/秒，20位收發(fā)器 |
| 文件頁(yè)數(shù)： | 14/19頁(yè) |
| 文件大?。?/td> | 251K |
| 代理商： | VSC7146 |
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VITESSE
Advance Product Information
VSC7146
2.5Gb/s, 20-Bit Transceiver
Page 14
VITESSE
SEMICONDUCTOR CORPORATION
741 Calle Plano, Camarillo, CA 93012 805/388-3700 FAX: 805/987-5896
8/28/00
G52162-0 Rev. 2.7
Table 6: Pin Identifications
Pin #
Name
Description
2, 4, 6, 9, 11, 14, 16, 18, 20,
23, 3, 5, 8, 10, 12, 15, 17,
19, 22, 24
T[0:19]
INPUTS - TTL:
Transmit Data Bus, Bit 0 through Bit 19. 20-bit Transmit Character. Parallel data on
this bus is clocked in on the rising edge of TBC. The data bit corresponding to T0 is
transmitted first.
INPUT - TTL:
Reference Clock. REF goes to the PLL/CMU circuitry and is multiplied 20 times
INPUT - TTL:
Transmit Byte Clock.
This rising edge of this clock latches T[0:19] into the input register and provides the
reference clock at 1/20th of the baud rate to the PLL.
OUTPUTS - Differential (AC-coupling recommended):
Transmitter Serial Outputs. These pins output the serialized transmit data when
EWRAP is LOW. When EWRAP is HIGH, TX+ is HIGH and TX- is LOW.
OUTPUTS - TTL:
Receive Data Bus, Bits 0 thru 19. 20-bit received character. Parallel data on this bus
can be sampled on the rising edge of RBC. R0 is the first bit received on RX+/RX-.
INPUT - TTL:
Transmitter Dual Rate Selector. LOW for half-speed operation (1.25Gb/s). HIGH for
full-speed operation (2.5 Gbps).
INPUT - TTL:
Receiver Dual Rate Selector. LOW for half-speed operation (1.25Gb/s). HIGH for
full-speed operation (2.5Gb/s).
INPUT - TTL:
Backwards Compatibility Mode Selector. LOW to allow operation in previous ver-
sion compatibility (no separate rate controls for transmitter and receiver). HIGH to
allow operation with separate rate controls for transmitter and receiver.
INPUT - TTL:
Enable Internal WRAP Mode. LOW for Normal Operation. When HIGH, an internal
loopback path from the transmitter to the receiver is enabled, TX+ = HIGH and TX-
is LOW.
INPUTS - Differential (AC-coupling recommended):
Receive Serial Inputs. The receiver inputs when EWRAP is LOW.
RBC, RBCNRecovered Byte Clock. Recovered clock and complement derived from 1/20
th
of the
RX+/- data rate. The rising edge of RBC corresponds to a new word on R[0:19].
INPUT - TTL: ENable Comma DETect. Enables COM_DET and word resynchroni-
zation when HIGH. When LOW, keeps current word alignment and disables
COM_DET.
OUTPUT - TTL:
COMma DETect. This output goes HIGH to indicate that R[0:6] contains a
“comma”
character (‘0011111’). COM_DET can be sampled on the rising edge of RBC.
26
REF
28
TBC
74,75
TX+, TX-
65, 63, 59, 57, 55, 52, 50,
48, 45, 43, 64, 62, 58, 56,
54, 51, 49, 47, 44, 42
R[0:19]
35
TXRATE
79
RXRATE
29
BCMN
36
EWRAP
68, 67
RX+, RX-
38, 39
34
EN_CDET
37
COM_DET
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